IP Library Granted Patent US 8,193,868
Granted Patent B2
US 8,193,868 · App. 12/769,046 · Granted Jun 5, 2012

Switched capacitor circuit for a voltage controlled oscillator

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Quick Facts
Patent No.
US 8,193,868
App. No.
12/769,046
Granted
Jun 5, 2012
Kind
B2
Abstract

A switched capacitor circuit for use at at least one operating frequency is provided. The switched capacitor may include an inductive element having a first terminal coupled to a switching voltage and a second terminal. The switched capacitor circuit may further include a hetero-junction bipolar transistor (HBT) having a base terminal coupled to the second terminal of the inductive element, a first conducting terminal, and a second conducting terminal coupled to a voltage supply terminal. The switched capacitor circuit may further include a capacitor having a first terminal coupled to the first conducting terminal of the HBT and a second terminal coupled to a node, wherein a capacitance value at the node is a function of the switching voltage, and wherein the inductive element is configured such that a combined impedance of an impedance of the capacitor, an impedance of the HBT, and an impedance of inductive element resonates at the at least one operating frequency only when the HBT is substantially non-conducting.

Claims (27)

1. A switched capacitor circuit for use at at least one operating frequency, the switched capacitor circuit comprising:

an inductive element having a first terminal and a second terminal, wherein the first terminal is coupled to receive a switching voltage;

a hetero-junction bipolar transistor (HBT) having a base terminal, a first conducting terminal, and a second conducting terminal, wherein the base terminal of the HBT is coupled to the second terminal of the inductive element, and wherein the second conducting terminal of the HBT is coupled to a voltage supply terminal; and

a capacitor having a first terminal and a second terminal, wherein the first terminal of the capacitor is coupled to the first conducting terminal of the HBT and the second terminal of the capacitor is coupled to a node, wherein

a capacitance value at the node is a function of the switching voltage,

the inductive element is configured such that a combined impedance of an impedance of the capacitor, an impedance of the HBT, and an impedance of inductive element resonates at the at least one operating frequency only when the HBT is substantially non-conducting, and

the node is coupled to a variable capacitor such that the variable capacitor is in parallel to the capacitor.

2. The switched capacitor circuit of claim 1 , wherein when the HBT is substantially conducting, the capacitance value at the node is substantially equal to the sum of capacitance of the capacitor and capacitance of the variable capacitor.

3. The switched capacitor circuit of claim 1 , wherein when the HBT is substantially non-conducting, the capacitance value at the node is substantially equal to capacitance of the variable capacitor.

4. The switched capacitor circuit of claim 1 , wherein the switched capacitor circuit is for use with a voltage controlled oscillator (VCO), and wherein the switching voltage has a first magnitude corresponding to a first range of frequencies of the VCO, wherein the switching voltage has a second magnitude corresponding to a second range of frequencies of the VCO, and wherein the first range of frequencies is different from the second range of frequencies.

5. The switched capacitor circuit of claim 1 , wherein the switched capacitor circuit is for use with a voltage controlled oscillator (VCO), and wherein the switching voltage is adjustable based on detecting a change in any one of process, voltage, or temperature associated with the functional circuit.

6. The switched capacitor circuit of claim 1 , wherein the first conducting terminal of the HBT is an emitter terminal of the HBT and the second conducting terminal of the HBT is a collector terminal of the HBT.

7. A differential voltage controlled oscillator (VCO) for providing at least one operating frequency, the differential VCO comprising:

a first switched capacitor circuit, comprising:

a first inductive element having a first terminal and a second terminal, wherein the first terminal is coupled to receive a switching voltage,

a first hetero-junction bipolar transistor (HBT) having a base terminal, a first conducting terminal, and a second conducting terminal, wherein the base terminal of the first HBT is coupled to the second terminal of the first inductive element, and wherein the second conducting terminal of the first HBT is coupled to a voltage supply terminal, and

a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the first conducting terminal of the first HBT and the second terminal of the first capacitor is coupled to a first node, wherein a capacitance value at the first node is a function of the switching voltage, and wherein the first inductive element is configured such that a combined impedance of an impedance of the first capacitor, an impedance of the first HBT, and an impedance of the first inductive element resonates at the at least one operating frequency only when the first HBT is substantially non-conducting, wherein the first node is coupled to a first variable capacitor such that the first variable capacitor is in parallel to the first capacitor; and

a second switched capacitor circuit, comprising:

a second inductive element having a first terminal and a second terminal, wherein the first terminal is coupled to receive the switching voltage,

a second hetero-junction bipolar transistor (HBT) having a base terminal, a first conducting terminal, and a second conducting terminal, wherein the base terminal of the second HBT is coupled to the second terminal of the second inductive element, and wherein the second conducting terminal of the second HBT is coupled to the voltage supply terminal, and

a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the first conducting terminal of the second HBT and the second terminal of the second capacitor is coupled to a second node, and wherein the second inductive element is configured such that a combined impedance of an impedance of the second capacitor, an impedance of the second HBT, and an impedance of the second inductive element resonates at the at least one operating frequency only when the second HBT is substantially non-conducting, wherein the second node is coupled to a second variable capacitor such that the second variable capacitor is in parallel to the second capacitor.

8. The differential VCO of claim 7 , wherein when each of the first HBT and the second HBT is substantially conductive: (1) the capacitance value at the first node is substantially equal to the sum of a capacitance value of the first capacitor and a capacitance of value the first variable capacitor, and (2) the capacitance value at the second node is substantially equal to the sum of a capacitance value of the second capacitor and a capacitance value of the second variable capacitor.

9. The differential VCO of claim 7 , wherein when each of the first HBT and the second HBT is substantially non-conducting: (1) the capacitance value at the first node is substantially equal to a capacitance value of the first variable capacitor, and (2) the capacitance value at the second node is substantially equal to a capacitance value of the second variable capacitor.

10. The differential VCO of claim 7 , wherein the switching voltage has a first magnitude corresponding to a first range of frequencies of the differential VCO, wherein the switching voltage has a second magnitude corresponding to a second range of frequencies of the differential VCO, and wherein the first range of frequencies is different from the second range of frequencies.

11. The differential VCO of claim 7 , wherein the switching voltage is adjustable based on detecting a change in any one of process, voltage, or temperature associated with the differential VCO.

12. The differential VCO of claim 7 , wherein the first conducting terminal of the first HBT is an emitter terminal of the first HBT and the second conducting terminal of the first HBT is a collector terminal of the first HBT, and wherein the first conducting terminal of the second HBT is an emitter terminal of the second HBT and the second conducting terminal of the second HBT is a collector terminal of the second HBT.

13. The differential VCO of claim 7 , wherein the first inductive element comprises a first transmission line, and wherein the second inductive element comprises a second transmission line.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
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To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
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Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
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SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Jan 31, 2012
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