IP Library Granted Patent US 8,298,863
Granted Patent B2
US 8,298,863 · App. 12/770,058 · Granted Oct 30, 2012

TCE compensation for package substrates for reduced die warpage assembly

Assignee: Texas Instruments Incorporated
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Quick Facts
Patent No.
US 8,298,863
App. No.
12/770,058
Granted
Oct 30, 2012
Kind
B2
Abstract

A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer. The composite carrier minimizes effects of the CTE mismatch between the die and the package substrate during assembly reduces warpage of the die. After the attaching, the semiconductor wafer is removed from the package substrate. Electrically conductive connectors are attached to the bottom surface of the package substrate, and the package substrate is sawed to form a plurality of singulated die packages.

Claims (13)

1. A method for assembling die packages, comprising:

providing a plurality of first die having respective contacts on a surface thereof; providing a composite carrier having substrate pads on a top surface thereof, the composite carrier comprising an organic package substrate including at least one embedded metal layer therein and a bottom surface; attaching the contacts of the plurality of die to the respective substrate pads of the composite carrier, the organic package substrate further having the bottom surface being secured to a semiconductor wafer

after said attaching, removing said semiconductor wafer from said organic package substrate;

attaching a plurality of electrically conductive connectors to said bottom surface of said organic package substrate, and

sawing said organic package substrate having the conductive connectors to form a plurality of singulated die packages.

2. The method of claim 1 , wherein said semiconductor wafer comprises a silicon wafer.

3. The method of claim 1 , wherein said plurality of first die are disposed on a wafer.

4. The method of claim 1 , wherein said plurality of first die comprise singulated die.

5. The method of claim 1 , wherein said plurality of electrically conductive connectors comprise a ball grid array (BGA).

6. The method of claim 1 , wherein said plurality of first die comprises through substrate via (TSV) die that include TSVs, wherein said contacts include contacts to said TSVs.

7. The method of claim 6 , further comprising:

thinning a second side of said plurality of TSV die to expose said TSVs to provide exposed TSV areas, and

attaching a plurality of singulated second die to TSV contacts coupled to said exposed areas to form a plurality of die stacks on said organic package substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2010
From: SIMMONS-MATTHEWS, MARGARET ROSE
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 024314/0182 →
Continuity (1)
Related Publication 20110266693A1 · Nov 3, 2011