Automatic reference frequency compensation
View Patent ↗In a first embodiment of the present invention, a method for operating a device having a device reference clock, in a system including a host with a host reference clock is provided, the method comprising: beginning a link negotiation stage between the device and the host using the device reference clock; during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock; applying the frequency offset to the device reference clock to create a corrected device reference clock; and completing the link negotiation stage using the corrected device reference clock. This completing may include either continuing the original link negotiation stage or restarting it.
1. A method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock, wherein the device reference clock and the host reference clock are incompatible with each other.
2. The method of claim 1 , wherein the completing includes restarting the link negotiation stage.
3. The method of claim 1 , wherein the difference between the device reference clock and the host reference clock is greater than an allowable tolerance of a protocol used by the device.
4. The method of claim 3 , wherein the protocol used by the device is the USB3.0 protocol and the allowable tolerance is 5600 parts per million (ppm).
5. A system comprising:
a host device having a host reference clock;
a motherboard coupled to the host device; and
a device having a device reference clock and coupled to the motherboard, wherein the device has logic to:
begin a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sample data received from the host to determine a frequency offset of the host reference clock;
apply the frequency offset to the device reference clock to create a corrected device reference clock; and
complete the link negotiation stage using the corrected device reference clock, wherein the motherboard is operating in a non-spread spectrum mode while the device is operating in a spread spectrum mode.
6. The system of claim 5 , wherein the motherboard is clocked using the host reference clock.
7. A device containing a device reference clock, for coupling to a motherboard having a host with a host reference clock, the device comprising:
means for beginning a link negotiation stage between the device and the host using the device reference clock;
means for during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock;
means for applying the frequency offset to the device reference clock to create a corrected device reference clock; and
means for completing the link negotiation stage using the corrected device reference clock, wherein the device reference clock and the host reference clock are incompatible with each other.
8. The device of claim 7 , wherein the difference between the device reference clock and the host reference clock is greater than an allowable tolerance of a protocol used by the device.
9. The device of claim 7 , wherein the host reference clock is overclocked.
10. The device of claim 7 , wherein the host reference clock is a center-spread reference clock and the device reference clock is a down-spread reference clock.
11. A program storage device readable by a machine tangibly embodying a program of instructions executable by the machine to perform a method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock, wherein the device reference clock and the host reference clock are incompatible with each other.
12. The program storage device of claim 11 , wherein the completing includes restarting the link negotiation stage.
13. A method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock, wherein the frequency offset is a fixed offset if the host is operating in a non-spread spectrum mode;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock.
14. A method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock, wherein the frequency offset is a range of frequency offsets if the host is operating in a spread-spectrum mode;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock.
15. A method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock, wherein the host reference clock is overclocked;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock.
16. A method for operating a device having a device reference clock, in a system including a host with a host reference clock, the method comprising:
beginning a link negotiation stage between the device and the host using the device reference clock;
during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock, wherein the host reference clock is a center-spread reference clock and the device reference clock is a down-spread reference clock.;
applying the frequency offset to the device reference clock to create a corrected device reference clock; and
completing the link negotiation stage using the corrected device reference clock.