Phase change memory device capable of reducing disturbance
A phase change memory device capable of reducing disturbances between adjacent PRAM memory cells and a fabrication method are presented. The phase change memory device includes word lines, heating electrodes, an interlayer insulating layer, and a phase change lines. The word lines are formed on a semiconductor substrate and extend in parallel with a constant space. The heating electrodes are electrically connected to the plurality of word lines. The interlayer insulating layer insulates the heating electrodes. The phase change lines extend in a direction orthogonal to the word line and are electrically connected to the heating electrodes. Curves are formed on a surface of the interlayer insulating layer between the word lines such that the effective length of the phase change layer between adjacent heating electrodes is larger than the physical distance between the adjacent heating electrodes.
1. A phase change memory device, comprising:
a plurality of word lines formed on a semiconductor substrate, the word lines substantially extending in parallel to each other and spaced apart evenly;
a plurality of heating electrodes electrically connected to the plurality of word lines;
a plurality of phase change lines on the interlayer insulating layer and on the heating electrodes, wherein the phase change lines include a substantially uniform thickness along a surface of the interlayer insulating layer; and
a plurality of bit lines formed to be overlapped on the plurality of the phase change lines and to be substantially orthogonal to the word lines,
wherein one of the plurality of the phase change lines includes a plurality of phase change areas,
wherein the interlayer insulating layer includes at least one of curving portions, and the one of the curving portions is continuously positioned between adjacent the phase change areas in one of the phase change lines.
2. The phase change memory device of claim 1 , wherein wherein the curving portions are formed by a difference of a thickness of the interlayer insulating layer, the interlayer insulating layer has a depth which is thicker nearer to the heating electrodes than away from the heating electrodes along the bit line direction, such that the curved upper surfaces of the interlayer insulating layer along the bit line direction are concave between adjacent heating electrodes.
3. The phase change memory device of claim 1 , wherein the curving portions are formed by a difference of a thickness of the interlayer insulating layer, the interlayer insulating layer has a depth which is thinner nearer to the heating electrodes than away from the heating electrodes, such that the curved upper surfaces of the interlayer insulating layer are convex between heating electrodes.
4. The phase change memory device of claim 1 , wherein the curving portions are formed by a difference of a thickness of the interlayer insulating layer, the interlayer insulating layer has a depth that oscillates between being thick and thin between adjacent heating electrodes, such that the curved upper surfaces of the interlayer insulating layer exhibits a wavy surface morphology.
5. The phase change memory device of claim 1 , wherein the phase change lines have an effective length between adjacent heating electrodes which is longer than a physical length between adjacent heating electrodes such that the effective length of the phase change lines between adjacent heating electrodes reduces disruptions brought about by heat dissipation from adjacent heating electrodes.
6. The phase change memory device of claim 1 , wherein the interlayer insulating layer has a substantially uniform depth thickness between adjacent heating electrodes along a word line direction.
7. The phase change memory device of claim 1 , further comprising switching devices electrically connected to the word lines between the semiconductor substrate and each of the heating electrodes.
8. The phase change memory device of claim 1 , wherein the curving potions of the phase change lines are areas which are contacted to the heating electrodes.