Semiconductor device and manufacturing the same
View Patent ↗A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
1. A semiconductor device comprising:
a first capacitor element including a first lower electrode, a first upper electrode and a first insulating film formed between the first lower electrode and the first upper electrode, the first upper electrode being formed over a semiconductor substrate;
a first interlayer insulating film formed over the first capacitor element and over the semiconductor substrate;
an inductor formed over the first interlayer insulating film and an uppermost wiring layer among a plurality of wiring layers; and
a second capacitor element formed over the first interlayer insulating film, the second capacitor element including a second lower electrode, a second upper electrode and a second insulating film formed between the second lower electrode and the second upper electrode,
wherein a first circuit is arranged on the semiconductor substrate and includes the first capacitor element,
wherein a second circuit is arranged on the semiconductor substrate and includes the second capacitor element, and
the first circuit and the inductor are included in an analog circuit.
2. A semiconductor device according to claim 1 ,
wherein the second circuit includes a first amplification stage and a second amplification stage,
wherein the first amplification stage is electrically coupled to the second amplification stage through an inter-stage matching circuit, and
wherein the inter-stage matching circuit includes the second capacitor element and the inductor.
3. A semiconductor device according to claim 2 ,
wherein the first amplification stage and the second amplification stage constitutes a transmission power amplifier.
4. A semiconductor device according to claim 1 ,
wherein a second interlayer insulating film is formed over the second upper electrode, and
wherein the inductor is formed over the second interlayer insulating film.
5. A semiconductor device according to claim 4 ,
wherein the first circuit includes an MISFET having a gate electrode,
wherein the second circuit constitutes a transmission power amplifier and includes a power MISFET having a gate electrode, and
wherein a gate length of the MISFET is greater than a gate length of the power MISFET.
6. A semiconductor device according to claim 1 ,
wherein a thickness of the second insulating film is greater than a thickness of the first insulating film.
7. A semiconductor device according to claim 1 ,
wherein each of the second lower electrode and the second upper electrode includes a metal film.
8. A semiconductor device comprising:
a first capacitor element including a first lower electrode, a first upper electrode and a first insulating film formed between the first lower electrode and the first upper electrode, the first upper electrode being formed over a semiconductor substrate;
a first interlayer insulating film formed over the first capacitor element and over the semiconductor substrate;
an inductor formed over the first interlayer insulating film and an uppermost wiring layer among a plurality of wiring layers;
a wiring line formed over the first interlayer insulating film and formed with the same level layer as the inductor;
a first insulating film formed over the inductor and the wiring line such that an opening is formed at a bonding pad area of the wiring line; and
a second capacitor element formed over the first interlayer insulating film, the second capacitor element including a second lower electrode, a second upper electrode and a second insulating film formed between the second lower electrode and the second upper electrode,
wherein a first circuit is arranged on the semiconductor substrate and includes the first capacitor element,
wherein a second circuit is arranged on the semiconductor substrate and includes the second capacitor element, and
wherein the first circuit and the inductor are included in an analog circuit.
9. A semiconductor device according to claim 8 ,
wherein the second circuit includes a first amplification stage and a second amplification stage,
wherein the first amplification stage is electrically coupled to the second amplification stage through an inter-stage matching circuit, and
wherein the inter-stage matching circuit includes the second capacitor element and the inductor.
10. A semiconductor device according to claim 9 ,
wherein the first amplification stage and the second amplification stage constitutes a transmission power amplifier.
11. A semiconductor device according to claim 8 ,
wherein a second interlayer insulating film is formed over the second upper electrode, and
wherein the inductor is formed over the second interlayer insulating film.
12. A semiconductor device according to claim 11 ,
wherein the first circuit includes an MISFET having a gate electrode,
wherein the second circuit constitutes a transmission power amplifier and includes a power MISFET having a gate electrode,
wherein a gate length of the MISFET is greater than a gate length of the power MISFET.
13. A semiconductor device according to claim 8 ,
wherein a thickness of the second insulating film is greater than a thickness of the first insulating film.
14. A semiconductor device according to claim 8 ,
wherein each of the second lower electrode and the second upper electrode includes a metal film.