IP Library Granted Patent US 8,404,541
Granted Patent B2
US 8,404,541 · App. 12/790,578 · Granted Mar 26, 2013

Strapping contact for charge protection

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Quick Facts
Patent No.
US 8,404,541
App. No.
12/790,578
Granted
Mar 26, 2013
Kind
B2
Abstract

A semiconductor device includes a substrate and a memory cell formed on the substrate. The memory cell includes a word line. The semiconductor device also includes a protection area formed in the substrate, a conductive structure configured to extend the word line to the protection area, and a contact configured to short the word line and the protection area.

Claims (38)

1. A method of forming a semiconductor device including a substrate, the method comprising:

forming a memory cell on the substrate, where the memory cell includes a word line;

forming a polysilicon structure connected to the word line;

forming a charge protection structure in the substrate; and

forming a strapping contact over and contacting a portion of a top surface of the polysilicon structure and abutting an end surface of the polysilicon structure, where the strapping contact shorts the word line and the charge protection structure.

2. The method of claim 1 , where forming the charge protection structure comprises forming a low voltage N well.

3. The method of claim 1 , where forming the charge protection structure includes forming:

an N-well formed in the substrate,

a heavily doped p-type region formed in the N-well, and

a heavily doped n-type region formed in the N-well and the substrate.

4. The method of claim 3 , where forming the strapping contact comprises forming the strapping contact to directly connect to the polysilicon structure and the heavily doped p-type region.

5. The method of claim 1 , where forming the strapping contact comprises forming a plurality of contacts, forming the memory cell comprises forming a plurality of word lines, and forming the polysilicon structure comprises forming a single conductive structure via which each of the plurality of contacts connects to a corresponding one of the word lines.

6. The method of claim 1 , where forming the strapping contact comprises forming the strapping contact at a height of from about 500 to about 5,000 Å on the charge protection structure.

7. The method of claim 1 , where forming the strapping contact comprises forming a strapping contact at a width of from about 300 to about 3,000 Å.

8. The method of claim 1 , further comprising forming a metal-1 layer below the polysilicon structure.

9. The semiconductor device of claim 1 , where the strapping contact protects the memory cell from in-line charging.

10. A method comprising:

forming a substrate;

forming a memory cell formed on the substrate, the memory cell including a word line;

forming a protection area in the substrate;

forming a conductive structure extending from the word line to the protection area; and

forming a contact as an abutment contacting two different surfaces of the conductive structure, where the contact provides shorting of the word line and the protection area.

11. The method of claim 10 , where forming the protection area comprises forming a diode structure.

12. The method of claim 11 , where forming the diode structure comprises:

forming an N-well formed in the substrate,

forming a heavily doped p-type region in the N-well, and

forming a heavily doped n-type region in the N-well and the substrate.

13. The method of claim 12 , where forming the contact comprises connecting the conductive structure and the heavily doped p-type region.

14. The method of claim 10 , where forming the diode structure comprises:

forming a P-well in the substrate,

forming a heavily doped n-type region in the P-well, and

forming a heavily doped p-type region in the P-well and the substrate.

15. The method of claim 14 , where forming the contact comprises directly connecting the conductive structure and the heavily doped n-type region.

16. The method of claim 10 , further comprising forming a metal-1 layer below the conductive structure.

17. The method of claim 10 , where the contact protects the memory cell from in-line charging.

18. The method of claim 10 , where the two different surfaces are substantially perpendicular to each other.

19. The method of claim 10 , where the contact contacts less than an entire surface area of one of the two different surfaces of the conductive structure and the contact contacts substantially an entire surface area of the other of the two different surfaces of the conductive structure.

20. The method of claim 10 , where the contact contacts substantially an entire surface area of the end surface.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded May 7, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 049109/0573 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: LONGITUDE FLASH MEMORY SOLUTIONS LTD.
Reel/Frame 049086/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2018
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 047308/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2018
From: ZHENG, WEI; YANG, JEAN; RANDOLPH, MARK; KWAN, MING; HE, YI; LIU, ZHIZHENG; DING, MENG
To: SPANSION LLC
Reel/Frame 047261/0352 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036055/0276 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028837/0076 →