IP Library Granted Patent US 8,071,418
Granted Patent B2
US 8,071,418 · App. 12/793,334 · Granted Dec 6, 2011

Selective emitter solar cells formed by a hybrid diffusion and ion implantation process

Assignee: Suniva, Inc.
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Quick Facts
Patent No.
US 8,071,418
App. No.
12/793,334
Granted
Dec 6, 2011
Kind
B2
Abstract

Solar cells and methods for their manufacture are disclosed. An example method may include providing a silicon substrate and introducing dopant to one or more selective regions of the front surface of the substrate by ion implantation. The substrate may be subjected to a single high-temperature anneal cycle. Additional dopant atoms may be introduced for diffusion into the front surface of the substrate during the single anneal cycle. A selective emitter may be formed on the front surface of the substrate such that the one or more selective regions of the selective emitter layer are more heavily doped than the remainder of the selective emitter layer. Associated solar cells are also provided.

Claims (28)

1. A method for forming a selective emitter solar cell by the use of a hybrid diffusion and ion implantation process, comprising:

providing a substrate comprising a base layer;

introducing dopant to one or more selective regions of the front surface of the base layer by ion implantation; and

annealing the substrate, wherein annealing comprises heating the substrate in a furnace to a temperature to:

diffuse additional dopant into the front surface of the base layer, wherein the additional dopant is introduced to the furnace during the anneal; and

form a selective emitter layer on the front surface of the base layer, wherein the one or more selective regions of the front surface of the base layer define one or more selective regions of the selective emitter layer that are more heavily doped than the remainder of the selective emitter layer.

2. The method of claim 1 wherein the substrate is a monocrystalline, Czochralski silicon substrate.

3. The method of claim 2 wherein the base layer is doped with p-type dopant and the selective emitter layer is doped with n-type dopant such that a p-n junction forms at the interface of the base layer and the selective emitter layer.

4. The method of claim 3 wherein the ion implanted dopant comprises phosphorus, and wherein the additional dopant introduced for diffusion are introduced in the form of phosphorus oxychloride (POCl 3 ).

5. The method of claim 1 , further comprising:

depositing an amorphous silicon nitride layer on the front surface of the selective emitter layer thereby forming an anti-reflective coating.

6. The method of claim 5 , further comprising:

screen-printing one or more silver front contacts on the amorphous silicon nitride layer in alignment with the one or more selective regions of the selective emitter layer.

7. The method of claim 6 , further comprising:

screen-printing one or more aluminum back contacts on the back surface of the substrate.

8. The method of claim 7 , further comprising:

co-firing the front and back contacts so that the one or more front contacts are in electrical communication with the one or more selective regions of the selective emitter layer through the amorphous silicon nitride layer.

9. The method of claim 8 , further comprising:

forming an aluminum-doped p + silicon back surface field layer by liquid phase epitaxial regrowth at the interface of the back surface of the base layer and the one or more back contacts during the co-firing of the front and back contacts, wherein the one or more back contacts are in electrical communication with the aluminum-doped p + silicon back surface field layer.

10. The method of claim 4 wherein diffusing additional dopant into the front surface of the base layer further comprises:

creating misfit dislocations in the selective emitter layer to provide a sink for iron gettering; and

injecting silicon interstitials into the substrate to drive out iron from substitutional sites into interstitial sites such that the iron diffuses rapidly to the gettering sink.

11. The method of claim 1 , further comprising:

introducing oxygen to the furnace during the anneal to form an oxide layer on the surface of the selective emitter layer for consuming a portion of the surface of the selective emitter layer.

12. The method of claim 11 , further comprising:

removing the oxide layer and consumed portion of the selective emitter layer by immersing the substrate in a bath of dilute hydrofluoric acid.

13. The method of claim 5 , further comprising:

removing a glass layer, which is formed during the anneal due to the diffusion of dopant, from the front surface of the selective emitter layer prior to depositing the amorphous silicon nitride layer.

Assignments (4)
SECURITY INTEREST Recorded Dec 17, 2015
From: SUNIVA, INC.
To: SQN ASSET SERVICING, LLC
Reel/Frame 037316/0228 →
PATENT AND TRADEMARK SECURITY AGREEMENT Recorded Jun 14, 2012
From: SUNIVA, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 028380/0595 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2010
From: ROHATGI, AJEET; YELUNDUR, VIJAY; DAVIS, HUBERT PRESTON; DAMIANI, BEN; CHANDRASEKARAN, VINODH
To: SUNIVA, INC.
Reel/Frame 024970/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2010
From: ROHATGI, AJEET; YELUNDUR, VIJAY; DAVIS, PRESTON; CHANDRASEKARAN, VINODH; DAMIANI, BEN
To: SUNIVA, INC.
Reel/Frame 024945/0662 →
Continuity (1)
Related Publication 20110139229A1 · Jun 16, 2011