IP Library › Granted Patent US 8,258,769
Granted Patent B2
US 8,258,769 · App. 12/797,212 · Granted Sep 4, 2012

Method of switching a PWM multi-phase voltage converter

Assignee: STMicroelectronics S.R.L.
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Quick Facts
Patent No.
US 8,258,769
App. No.
12/797,212
Granted
Sep 4, 2012
Kind
B2
Abstract

A circuit may generate a clock signal with a variable period given by a ratio between an initial switching period and a number of phase circuits through which a current of a multi-phase PWM voltage converter flows. The circuit may include an adjustable current generator driven by a signal representing the number of phase circuits through which the current flows and configured to generate a current proportional to the number of phase circuits through which the current flows, and a tank capacitor charged by the adjustable current generator. The circuit may include a comparator of a voltage on the tank capacitor with a threshold value configured to generate a pulse of the clock signal when the threshold value is attained, and a discharge path of the tank capacitor, the discharge path being enabled during the pulses of the clock signal.

Claims (51)

1. A method of switching a pulse width modulated (PWM) multi-phase voltage converter from a first functioning condition in which all N phase circuits are on to a second functioning condition in which m phase circuits are on and the other N−m phase circuits are off, the voltage converter being driven with PWM driving signals having an initial switching period, the method comprising:

driving the N−m phase circuits to be turned off with PWM signals having a null duty-cycle and turning off the N−m phase circuits as the current flowing therethrough is zero;

setting a switching period of the m on phase circuits to a value given by a product between m and a ratio between the initial switching period and the number of phase circuits through which a current flows, the setting performed by at least reducing correspondingly the respective off time; and

updating the switching period of the m on phase circuits as the N−m phase circuits are turned off.

2. The method of claim 1 wherein one phase circuit remains on.

3. The method of claim 1 further comprising setting in a high impedance state phase circuits to be turned off when the current flowing therethrough decreases below a turn off level.

4. The method of claim 1 further comprising setting in a high impedance state phase circuits to be turned off when the current flowing therethrough is zero.

5. The method of claim 1 wherein the switching period of the on phase circuits is determined by a respective clock signal of variable period by at least:

generating a signal representative of the number of phase circuits in which a current flows by sensing threshold current crossings in the phase circuits of the multi-phase voltage converter;

using a current generator commanded by the signal representative of the number of phase circuits to generate a current proportional to the number of phase circuits through which a current flows;

charging a tank capacitor with the current generator; and

generating pulses of the clock signal by iteratively performing at least

comparing a voltage on the tank capacitor with a threshold,

generating the pulse of the clock signal when the threshold is attained, and

discharging the tank capacitor.

6. The method of claim 5 wherein the current generator comprises an adjustable current generator.

7. A method of switching a pulse width modulated (PWM) multi-phase voltage converter from a first functioning condition in which all N phase circuits are on to a second functioning condition in which a single phase circuit is on and the other N−1 phase circuits are off, the voltage converter being driven with PWM driving signals having an initial switching period, the method comprising:

driving the N−1 phase circuits to be turned off with PWM signals having a null duty-cycle and turning off the N−1 phase circuits as the current flowing therethrough is zero;

setting a switching period of the single phase circuit to a value given by a product between one and a ratio between the initial switching period and the number of phase circuits through which a current flows, the setting performed by at least reducing correspondingly the respective off time;

updating the switching period of the single phase circuit as the N−1 phase circuits are turned off; and

setting in a high impedance state phase circuits to be turned off when the current flowing therethrough decreases below a turn off level.

8. The method of claim 7 further comprising setting in a high impedance state phase circuits to be turned off when the current flowing therethrough is zero.

9. The method of claim 7 wherein the switching period of the on phase circuits is determined by a respective clock signal of variable period by at least:

generating a signal representative of the number of phase circuits in which a current flows by sensing threshold current crossings in the phase circuits of the multi-phase voltage converter;

using a current generator commanded by the signal representative of the number of phase circuits to generate a current proportional to the number of phase circuits through which a current flows;

charging a tank capacitor with the current generator; and

generating pulses of the clock signal by iteratively performing at least

comparing a voltage on the tank capacitor with a threshold,

generating the pulse of the clock signal when the threshold is attained, and

discharging the tank capacitor.

10. A circuit for generating a clock signal with a variable period given by a ratio between an initial switching period and a number of phase circuits through which a current of a multi-phase PWM voltage converter flows, the circuit comprising:

a current generator configured to be driven by a signal representing the number of phase circuits through which the current flows and to generate a current based upon the number of phase circuits through which the current flows;

a tank capacitor configured to be charged by said current generator;

a comparator configured to compare a voltage on said tank capacitor with a threshold value and to generate a pulse of the clock signal when the threshold value is attained; and

a discharge path of said tank capacitor configured to be enabled during the pulses of the clock signal.

11. The circuit of claim 10 wherein said current generator is configured to generate the current proportional to the number of phase circuits through which the current flows.

12. The circuit of claim 10 wherein said current generator comprises an adjustable current generator.

13. A multi-phase pulse width modulated (PWM) voltage converter comprising:

a circuit configured to generate a clock signal with a variable period given by a ratio between an initial switching period and a number of phase circuits through which a current of the multi-phase PWM voltage converter flows, said circuit comprising

a current generator configured to be driven by a signal representing the number of phase circuits through which the current flows and to generate a current based upon the number of phase circuits through which the current flows,

a tank capacitor configured to be charged by said current generator,

a comparator configured to compare a voltage on said tank capacitor with a threshold value and to generate a pulse of the clock signal when the threshold value is attained, and

a discharge path of said tank capacitor configured to be enabled during the pulses of the clock signal; and

a generator configured to generate PWM driving signals for on phase circuits of the multi-phase PWM voltage converter, the PWM driving signals having fractional period in respect to a period of the clock signal.

14. The multi-phase PWM voltage converter of claim 13 wherein said current generator is configured to generate the current proportional to the number of phase circuits through which the current flows.

15. The multi-phase PWM voltage converter of claim 13 wherein said current generator comprises an adjustable current generator.

16. The multi-phase PWM voltage converter of claim 13 further comprising:

a plurality of MOS drivers to be coupled to said generator; and

an error amplifier coupled to said plurality of MOS drivers.

17. The multi-phase PWM voltage converter of claim 16 wherein said error amplifier is configured to receive a reference voltage and an output of said plurality of plurality of MOS drivers.

18. The multi-phase PWM voltage converter of claim 13 wherein said circuit is configured to receive signal for switching from a first functioning condition in which all N phase circuits are on to a second functioning condition in which m phase circuits are on and the other N−m phase circuits are off.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2010
From: ZAMBETTI, OSVALDO ENRICO; GIORGETTI, DANIELE
To: STMICROELECTRONICS S.R.L.
Reel/Frame 024675/0791 →
Priority Claims (1)
IT VA2009A0034 · Jun 10, 2009 · national
Continuity (1)
Related Publication 20100315052A1 · Dec 16, 2010