IP Library Patent Application 12801247
Patent Application
App. No. 12/801,247

Semiconductor device and method of removing semiconductor device noise

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Quick Facts
Patent No.
US None
App. No.
12/801,247
Abstract

A semiconductor device includes: a noise detecting circuit; an input signal delaying circuit; and a mask circuit. The noise detecting circuit detects noise superimposed on an input signal and outputs a mask signal during a predetermined time period. The input signal delaying circuit delays the input signal and outputs a delay signal thereof. The mask circuit outputs an output signal in which the delay signal is masked based on the mask signal.

Claims (41)

1 . A semiconductor device comprising:

a noise detecting circuit configured to detect noise superimposed on an input signal and output a mask signal during a predetermined time period;

an input signal delaying circuit configured to delay the input signal and output a delay signal thereof; and

a mask circuit configured to output an output signal in which the delay signal is masked based on the mask signal.

2 . The semiconductor device according to claim 1 , wherein noise detecting circuit includes:

a first flip-flop configured to be reset in response to any of the noise and the input signal,

a second flip-flop configured to be reset in response to the input signal,

an agreement determinating circuit configured to determine whether or not a first output of the first flip-flop agrees with a second output of the second flip-flop and output an disagreement signal if the first output disagrees with the second output,

a disagreement signal delaying circuit configured to delay the disagreement signal during the predetermined time period, and

a third flip-flop configured to be set in response to the disagreement signal and be reset when the second flip-flop is reset.

3 . The semiconductor device according to claim 2 , wherein the first flip-flop and the second flip-flop are asynchronously reset in response to the input signal.

4 . The semiconductor device according to claim 2 , wherein the first flip-flop is asynchronously reset in response to the input signal, and

wherein the second flip-flop is synchronized with a clock signal and is reset in response to the input signal.

5 . The semiconductor device according to claim 2 , wherein the second flip-flop and the input signal delaying circuit receive the input signal through an integration circuit.

6 . The semiconductor device according to claim 5 , wherein the first flip-flop receives the input signal through the integration circuit.

7 . The semiconductor device according to claim 1 , wherein noise resistance properties of the first flip-flop is inferior to that of the second flip-flop.

8 . The semiconductor device according to claim 7 , wherein a size of a transistor included in the first flip-flop is smaller than that of a transistor included in the second flip-flop.

9 . The semiconductor device according to claim 7 , wherein a power supply voltage supplied to the first flip-flop is lower than that supplied to the second flip-flop.

10 . The semiconductor device according to claim 7 , wherein a threshold voltage of a transistor included in the first flip-flop is lower than that of a transistor included in the second flip-flop.

11 . The semiconductor device according to claim 1 , wherein the noise detecting circuit is arranged in a vicinity of an input terminal where the input signal is supplied.

12 . The semiconductor device according to claim 1 , wherein the noise detecting circuit is arranged in a vicinity of a power supply terminal where power supply is performed.

13 . The semiconductor device according to claim 1 , further comprising:

a plurality of noise detecting circuits including the noise detecting circuit,

wherein the plurality of noise detecting circuit is arranged so as to be dispersed on a periphery of the semiconductor device.

14 . The semiconductor device according to claim 1 , wherein the input signal is a level signal which transmits data depending on a voltage level that a delay is allowed.

15 . The semiconductor device according to claim 14 , wherein the level signal is a reset signal initially set asynchronously.

16 . A method of removing semiconductor device noise, comprising:

detecting noise superimposed on an input signal;

delaying the input signal; and

masking a delay signal in which the input signal is delayed when detecting the noise.

17 . The method of removing semiconductor device noise according to claim 16 , wherein the detecting step includes:

resetting a first flip-flop in response to the input signal,

resetting a second flip-flop in response to the input signal,

determinating whether or not a first output of the first flip-flop agrees with a second output of the second flip-flop,

resetting the first flip-flop and the second flip-flop after elapse of a predetermined time period if the first output disagrees with the second output,

setting a third flip-flop to output a mask signal if the first output disagrees with the second output, and

resetting the third flip-flop to release the mask signal when the second flip-flop is reset,

wherein the masking step includes:

masking the delay signal based on the mask signal.

18 . The method of removing semiconductor device noise according to claim 17 , further comprising:

setting noise resistance properties of the first flip-flop to be inferior to that of the second flip-flop.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0916 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2010
From: WAKITA, RIKA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024513/0013 →