Method and apparatus for the prevention of untested or improperly tested printed circuit boards from being used in a fire pump control system
The present invention relates to a method and apparatus for preventing untested or improperly tested printed circuit boards from being used in a fire pump control system by interrogating each printed circuit board to ensure post-assembly fitness. Exemplary embodiments of the present invention comprise retrieving test status information stored on non-volatile memory of a printed circuit board, verifying the test status information stored on the non-volatile memory of the PCB, determining if all tests performed on the PCB have passed, outputting a message regarding the status of the PCB, and continuing to interrogate each additional PCB in the fire pump controller. A pass flag is set and recorded on the non-volatile memory of a respective PCB if all tests on the respective PCB have passed. Whereas, an error flag is set and recorded on the non-volatile memory if at least one test on a respective PCB has failed.
1. A computer-implemented method for interrogating each printed circuit board (PCB) in a fire pump controller to ensure post-assembly fitness, the method comprising the steps of:
(a) retrieving test status information stored on non-volatile memory of a printed circuit board;
(b) verifying the test status information stored on the non-volatile memory of the PCB;
(c) determining if all tests performed on the PCB have passed;
(d) outputting a message regarding the status of the PCB; and
(e) continuing steps (a)-(d) for each additional PCB in the fire pump controller.
2. The computer-implemented method of claim 1 , wherein a pass flag is set and recorded on the non-volatile memory of a respective PCB if all tests on the respective PCB have passed.
3. The computer-implemented method of claim 1 , wherein an error flag is set and recorded on the non-volatile memory if at least one test on a respective PCB has failed.
4. The computer-implemented method of claim 1 , wherein an error flag is set if the test status information of a respective PCB is incomplete or corrupted, indicates that the PCB is new or mismatched, or indicates that a functional or burn-in test has failed.
5. The computer-implemented method of claim 1 , wherein the test status information includes a test date, a test operator, and a pass/fail test result of a functional test of a respective PCB.
6. The computer-implemented method of claim 1 , wherein the test status information includes a test date, a test operator, and a pass/fail test result of a burn-in test of a respective PCB.
7. The computer-implemented method of claim 1 , wherein steps (a)-(e) can be performed wirelessly from a remote client machine.
8. The computer-implemented method of claim 1 , wherein the non-volatile memory is an electrically erasable programmable read-only memory (EEPROM).
9. The computer-implemented method of claim 8 , wherein the EEPROM of each respective PCB stores at least one of a part number, a revision number, a PCB serial number, a control system serial number, a functional test date, a functional test operator, a functional test result, a burn-in test date, a burn-in test operator, a burn-in test result, and flags.
10. A computer apparatus containing a data processor with programmed instructions for interrogating test status information data transmitted from each printed circuit board (PCB) of a fire pump controller, said computer apparatus comprising:
(a) computer-executable instructions for retrieving test status information stored on non-volatile memory of a PCB;
(b) computer-executable instructions for verifying the test status information stored on the non-volatile memory of the PCB;
(c) computer-executable instructions for determining if all tests performed on the PCB have passed;
(d) computer-executable instructions for outputting a message regarding the status of the PCB; and
(e) computer-executable instructions for continuing instructions (a)-(d) for each additional PCB in the fire pump controller.
11. The computer apparatus of claim 10 , wherein a pass flag is set and recorded on the non-volatile memory of a respective PCB if all tests on the respective PCB have passed.
12. The computer apparatus of claim 10 , wherein an error flag is set and recorded on the non-volatile memory if at least one test on a respective PCB has failed.
13. The computer apparatus of claim 10 , wherein an error flag is set if the test status information of a respective PCB is incomplete or corrupted, indicates that the PCB is new or mismatched, or indicates that a functional or burn-in test has failed.
14. The computer apparatus of claim 10 , wherein the test status information includes a test date, a test operator, and a pass/fail test result of a functional test of a respective PCB.
15. The computer apparatus of claim 10 , wherein the test status information includes a test date, a test operator, and a pass/fail test result of a burn-in test of a respective PCB.
16. The computer apparatus of claim 10 , wherein computer-executable instructions (a)-(e) can be performed wirelessly from a remote computer.
17. The computer apparatus of claim 10 , wherein the non-volatile memory is an electrically erasable programmable read-only memory (EEPROM).
18. The computer apparatus of claim 17 , wherein the EEPROM of each respective PCB stores at least one of a part number, a revision number, a PCB serial number, a control system serial number, a functional test date, a functional test operator, a functional test result, a burn-in test date, a burn-in test operator, a burn-in test result, and flags.