IP Library Granted Patent US 7,940,361
Granted Patent B2
US 7,940,361 · App. 12/803,943 · Granted May 10, 2011

Copper alloy and liquid-crystal display device

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Quick Facts
Patent No.
US 7,940,361
App. No.
12/803,943
Granted
May 10, 2011
Kind
B2
Abstract

A liquid crystal display device including, a pair of substrates, a gate electrode of a thin film transistor (TFT) formed on one of the substrates, and a wiring layer connected to the gate electrode or an electrode of the thin film transistor, wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn, wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.

Claims (52)

1. A liquid crystal display device comprising:

a pair of substrates;

a gate electrode of a thin film transistor (TFT) formed on one of the substrates; and

a wiring layer connected to the gate electrode or an electrode of the thin film transistor;

wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn,

wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and

wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.

2. The liquid crystal display device of the claim 1 , wherein a thickness of the Mn oxide layer is 1-10 nm.

3. A liquid crystal display device comprising:

a pair of substrates;

a gate electrode and a gate insulation layer of a thin film transistor (TFT) formed on one of the substrates; and

a wiring layer connected to the gate electrode or an electrode of the thin film transistor;

wherein at least a part of the gate electrode or a part the wiring layer is structured by a layer in which a pure copper layer is sandwiched by Cu—Mn alloy layers including Mn,

wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and

wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate, and a boundary surface between the Cu—Mn alloy layer and the gate insulation layer include an oxide layer having a Mn oxide layer.

4. The liquid crystal display device of the claim 3 , wherein a thickness of the Mn oxide layer is 1-10 nm.

5. A liquid crystal display device comprising:

a pair of substrates;

a gate electrode and a gate insulation layer of a thin film transistor (TFT) formed on one of the substrates; and

a wiring layer connected to the gate electrode or an electrode of the thin film transistor;

wherein at least a part of the gate electrode or a part the wiring layer is structured by a layer in which a pure copper layer is coated by a Cu—Mn alloy layer including Mn,

wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and

wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate, and a boundary surface between the Cu—Mn alloy layer and the gate insulation layer include an oxide layer having a Mn oxide layer.

6. The liquid crystal display device of the claim 5 ,

wherein a thickness of the Mn oxide layer is 1-10 nm.

7. A method of forming an oxide layer on a surface of a gate electrode or of a wiring layer of a thin film transistor (TFT) of a liquid crystal display, the method comprising the steps of:

providing a substrate;

forming a Cu alloy layer including copper and an element selected from the group consisting of Mn, Zn, Ge, Sr, Ag, Ba, Pr, and Nd on the wiring layer on the substrate;

forming a pure copper layer on the Cu alloy layer; and

performing a heat treatment,

wherein a concentration of the element in the Cu alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of the element in the copper, and

wherein at least a part of the gate electrode or the wiring layer is structured by the pure copper layer or the Cu alloy layer.

8. The method of forming an oxide layer of the claim 7 ,

wherein a thickness of the oxide layer is 1-10 nm.

9. A method of forming an oxide layer on a surface of a gate electrode or of a wiring layer of a thin film transistor (TFT) of a liquid crystal display, the method comprising the steps of:

providing a substrate;

forming a Cu alloy layer including copper and an element selected from the group consisting of Mn, Zn, Ge, Sr, Ag, Ba, Pr, and Nd on the substrate;

forming a pure copper layer on the Cu alloy layer,

forming a Cu alloy layer including copper and an element selected from the group consisting of Mn, Zn, Ge, Sr, Ag, Ba, Pr, and Nd on the copper layer so as to sandwich the pure copper layer; and

performing a heat treatment,

wherein a concentration of the element in the Cu alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of the element in the copper, and

wherein a part of the gate electrode or the wiring layer is formed by layers of a copper layer and the Cu alloy layer.

10. The method of forming an oxide layer of the claim 9 ,

wherein a thickness of the oxide layer is 1-10 nm.

11. A method of forming an oxide layer on a surface of a gate electrode or of a wiring layer of a thin film transistor (TFT) of a liquid crystal display, the method comprising the steps of:

providing a substrate;

forming a Cu alloy layer including copper and an element selected from the group consisting of Mn, Zn, Ge, Sr, Ag, Ba, Pr, and Nd on the substrate;

forming a pure copper layer on the Cu alloy layer,

forming a Cu alloy layer including copper and an element selected from the group consisting of Mn, Zn, Ge, Sr, Ag, Ba, Pr, and Nd so as to coat the copper layer so as to coat a surface of the pure copper;

performing a heat treatment;

wherein a concentration of the element in the Cu alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of the element in the copper, and

wherein a part of the gate electrode or the wiring layer is formed by layers of a copper layer and the Cu alloy layer.

Assignments (5)
MERGER Recorded Oct 22, 2015
From: ALTIAM SERVICES LTD. LLC
To: XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY
Reel/Frame 036855/0346 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2012
From: ADVANCED INTERCONNECT MATERIALS, LLC
To: ALTIAM SERVICES LTD. LLC
Reel/Frame 028083/0909 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2011
From: TOHOKU UNIVERSITY
To: ADVANCED INTERCONNECT MATERIALS, LLC
Reel/Frame 026008/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2010
From: KOIKE, JUNICHI
To: ADVANCED INTERCONNECT MATERIALS LLC
Reel/Frame 025037/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2010
From: KOIKE, JUNICHI
To: TOHOKU UNIVERSITY; ADVANCED INTERCONNECT MATERIALS LLC
Reel/Frame 025099/0750 →