IP Library › Granted Patent US 8,278,640
Granted Patent B2
US 8,278,640 · App. 12/805,783 · Granted Oct 2, 2012

Resistive random access memory devices and resistive random access memory arrays having the same

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,278,640
App. No.
12/805,783
Granted
Oct 2, 2012
Kind
B2
Abstract

A resistive random access memory (RRAM) devices and resistive random access memory (RRAM) arrays are provided, the RRAM devices include a first electrode layer, a variable resistance material layer formed of an oxide of a metallic material having a plurality of oxidation states, an intermediate electrode layer on the variable resistance material layer and formed of a conductive material having a lower reactivity with oxygen than the metallic material, and a second electrode layer on the intermediate electrode layer. The RRAM arrays include at least one of the aforementioned RRAM devices.

Claims (17)

1. A resistive random access memory (RRAM) device, comprising:

a first electrode layer;

a variable resistance material layer formed of a metallic oxide material having a plurality of oxidation states;

an intermediate electrode layer on the variable resistance material layer, the intermediate electrode layer formed of a conductive material having a lower reactivity with oxygen than the metallic oxide material; and

a second electrode layer on the intermediate electrode layer, wherein the second electrode layer includes aluminum (Al).

2. The RRAM device of claim 1 , wherein the intermediate electrode layer is formed of a conductive oxide.

3. The RRAM device of claim 2 , wherein the intermediate electrode layer is formed of indium tin oxide (ITO) or indium zinc oxide (IZO).

4. The RRAM device of claim 1 , wherein the metallic oxide material is at least one oxide selected from the group consisting of tantalum (Ta) oxide, nickel (Ni) oxide, titanium (Ti) oxide, iron (Fe) oxide, cobalt (Co) oxide, manganese (Mn) oxide, tungsten (W) oxide and mixtures thereof.

5. The RRAM device of claim 1 , wherein the variable resistance material layer has bipolar memory characteristics.

6. The RRAM device of claim 1 , wherein the variable resistance material layer has multi-level variable resistance characteristics having a different resistance value according to an applied voltage.

7. The RRAM device of claim 6 , wherein the metallic oxide is tantalum (Ta) oxide, and

wherein the intermediate electrode layer is formed of ITO.

8. The RRAM device of claim 1 , wherein the first electrode layer is formed of one selected from the group consisting of platinum (Pt), ruthenium (Ru), iridium (Ir), nickel (Ni), cobalt (Co), chromium (Cr), tungsten (W), copper (Cu) and mixtures thereof.

9. A resistive random access memory (RRAM) array, comprising:

a plurality of first RRAM devices each disposed between a first electrode line and a second electrode line; and

a plurality of second RRAM devices each disposed between the second electrode line and a third electrode line,

wherein each of the first and second RRAM devices is the RRAM device according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2010
From: LEE, DONG-SOO; LEE, CHANG-BUM; KIM, CHANG-JUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 024902/0062 →
Priority Claims (1)
KR 10-2009-0130033 · Dec 23, 2009 · national
Continuity (1)
Related Publication 20110147696A1 · Jun 23, 2011