Capacitive MEMS switch and method of fabricating the same
View Patent ↗The present invention discloses a capacitive MEMS switch on top of a semiconductor substrate containing a CMOS driving circuitry. The capacitive MEMS switch disclosed includes: 1) a semiconductor substrate containing a driving circuitry inside, and first and second conductors as well as a bottom electrode on top; 2) a suspended composite beam above and anchored onto the semiconductor substrate, containing a top electrode aligned to the bottom electrode with a first vertical distance, a top conductor, capped by a dielectric layer, having a first and second contact tips aligned with the first and second bottom conductors with a second vertical distance differentially smaller than the first vertical distance. The electrostatic attraction generated between the top electrode and the bottom electrode pulls the first and second contact tips in physical contact with and electrically connects the first and second bottom conductors through the top conductor.
1. A method of fabricating a capacitive MEMS switch, comprising:
forming a driving circuitry on a semiconductor substrate;
forming a first bottom electrode, a first bottom conductor and a second bottom conductor on top of the semiconductor substrate by lithographically patterning;
depositing a first sacrificial film onto the semiconductor substrate wherein the first sacrificial film covers the first bottom electrode, the first bottom conductor and the second bottom conductor;
lithographically patterning and etching the first sacrificial film to form etch holes onto part of the first bottom conductor and the second bottom conductor;
depositing a second sacrificial film topping the remaining first sacrificial film and the exposed portion of the first bottom conductor and the second bottom conductor;
lithographically patterning a composite film comprising the first sacrificial film and the second sacrificial film to etch an open portion unto the semiconductor substrate for anchoring a suspended composite beam;
depositing a top electrode film directly on the composite film and into the open portion so as to directly contact the semiconductor substrate, and lithographically patterning the top electrode film to form a first top electrode and a top conductor having a first contact tip and a second contact tip positioned corresponding to the etch holes onto part of the first bottom conductor and the second bottom conductor, respectively;
depositing a dielectric layer on top of the first top electrode, the top conductor, and the composite film and lithographically patterning the dielectric layer to form the suspended composite beam;
selectively removing the remaining composite film so that a bottom surface of the first top electrode directly faces an upper surface of the first bottom electrode.
2. The method according to claim 1 , wherein at the same time when depositing the top electrode film on top of the composite film and lithographically patterning the top electrode film to form the first top electrode and the top conductor, a second top electrode in symmetry with the first top electrode is formed.
3. The method according to claim 1 , wherein the first sacrificial film and the second sacrificial film are carbon films.
4. The method according to claim 3 , wherein the first sacrificial film and the second sacrificial film are removed by selective etch process gas of oxygen or nitrogen in a reactor chamber containing plasma generated with a plasma source power.
5. The method according to claim 3 , wherein the first sacrificial film and the second sacrificial film are deposited by means of:
placing the semiconductor substrate in a reactor chamber;
introducing a carbon-containing process gas into the reactor chamber and introducing a layer-enhancing additive gas that enhances thermal properties of the first sacrificial film and the second sacrificial film;
generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the substrate by coupling a plasma RF source power to an external portion of the reentrant path; and
coupling RF plasma bias power or bias voltage to the semiconductor substrate.
6. A method of fabricating a capacitive MEMS switch, comprising:
forming a driving circuitry on a semiconductor substrate;
forming a first bottom electrode, a first bottom conductor and a second bottom conductor on top of the semiconductor substrate by lithographically patterning;
depositing a first sacrificial film onto the semiconductor substrate wherein the first sacrificial film covers the first bottom electrode, the first bottom conductor and the second bottom conductor;
lithographically patterning and etching the first sacrificial film to form first etch holes onto part of the first bottom conductor and the second bottom conductor;
depositing a second sacrificial film topping the remaining first sacrificial film and the exposed portion of the first bottom conductor and the second bottom conductor;
lithographically patterning a composite film comprising the first sacrificial film and the second sacrificial film to etch an open portion unto the semiconductor substrate for anchoring a suspended composite beam;
depositing a top electrode film directly on the composite film and lithographically patterning the top electrode film to form a first top electrode;
depositing a dielectric layer on top of the first top electrode, the composite film and producing second etch holes through the dielectric layer, positioned corresponding to the first etch holes onto part of the first bottom conductor and the second bottom conductor, respectively;
depositing a top conductor layer on the dielectric layer and into the etch holes, and lithographically patterning the top conductor layer to form the suspended composite beam and a top conductor having a first contact tip and a second contact tip, wherein the dielectric layer is above the first top electrode but beneath the top conductor;
selectively removing the remaining composite film so that a bottom surface of the first top electrode directly faces an upper surface of the first bottom electrode.
7. The method according to claim 6 , wherein at the same time when depositing the top electrode film on top of the composite film and lithographically patterning the top electrode film to form the first top electrode and the top conductor, a second top electrode in symmetry with the first top electrode is formed.
8. The method according to claim 6 , wherein the first sacrificial film and the second sacrificial film are carbon films.
9. The method according to claim 8 , wherein the first sacrificial film and the second sacrificial film are deposited by means of:
placing the semiconductor substrate in a reactor chamber;
introducing a carbon-containing process gas into the reactor chamber and introducing a layer-enhancing additive gas that enhances thermal properties of the first sacrificial film and the second sacrificial film;
generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the substrate by coupling a plasma RF source power to an external portion of the reentrant path; and
coupling RF plasma bias power or bias voltage to the semiconductor substrate.
10. The method according to claim 8 , wherein the first sacrificial film and the second sacrificial film are removed by selective etch process gas of oxygen or nitrogen in a reactor chamber containing plasma generated with a plasma source power.