IP Library Granted Patent US 8,304,340
Granted Patent B2
US 8,304,340 · App. 12/818,570 · Granted Nov 6, 2012

Method for manufacturing stacked contact plugs

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,304,340
App. No.
12/818,570
Granted
Nov 6, 2012
Kind
B2
Abstract

A semiconductor device manufacturing method including: forming a first interlayer insulating film on a semiconductor substrate; forming a first hole in the first interlayer insulating film; forming a barrier film inside the first hole; filling a conductive material in the first hole to form a first plug; forming a second interlayer insulating film on the first interlayer insulating film; forming a second hole reaching the first plug in the second interlayer insulating film; selectively etching an upper end of the barrier film inside the second hole; and forming a second plug for connection to the first plug inside the second hole.

Claims (28)

1. A semiconductor device manufacturing method comprising:

forming a first interlayer insulating film over a semiconductor substrate;

forming a first hole in the first interlayer insulating film;

forming a barrier film inside the first hole;

filling a conductive material in the first hole to form a first plug;

forming a second interlayer insulating film over the first interlayer insulating film;

forming a second hole reaching the first plug in the second interlayer insulating film by using a first etching gas;

selectively etching an upper end of the barrier film inside the second hole by using a second etching gas that is different from the first etching gas; and

forming a second plug for connection to the first plug inside the second hole.

2. A semiconductor device manufacturing method comprising:

forming a first interlayer insulating film over a semiconductor substrate;

forming a first hole in the first interlayer insulating film;

forming a barrier film containing titanium inside the first hole;

filling a conductive material in the first hole to form a first plug;

forming a second interlayer insulating film over the first interlayer insulating film;

performing dry etching using a first etching gas containing a fluorine atom-containing component to form a second hole reaching the first plug in the second interlayer insulating film;

selectively etching using a second etching gas that is different from the first etching gas to remove an altered layer formed as the result of an upper end of the barrier film being transformed inside the second hole; and

forming a second plug for connection to the first plug inside the second hole.

3. The semiconductor device manufacturing method according to claim 1 , wherein the selective etching is performed so that the upper end of the barrier film is recessed with respect to the upper end of the conductive material.

4. The semiconductor device manufacturing method according to claim 2 , wherein the selective etching is performed so that the upper end of the barrier film is recessed with respect to the upper end of the conductive material.

5. The semiconductor device manufacturing method according to claim 1 , wherein the selective etching is dry etching using the second etching gas containing at least one of chlorine, boron trichloride and hydrogen chloride.

6. The semiconductor device manufacturing method according to claim 2 , wherein the selective etching is dry etching using the second etching gas containing at least one of chlorine, boron trichloride and hydrogen chloride.

7. The semiconductor device manufacturing method according to claim 1 , wherein the barrier film is a titanium nitride film.

8. The semiconductor device manufacturing method according to claim 2 , wherein the barrier film is a titanium nitride film.

9. The semiconductor device manufacturing method according to claim 1 , wherein the conductive material is a metal.

10. The semiconductor device manufacturing method according to claim 2 , wherein the conductive material is a metal.

11. The semiconductor device manufacturing method according to claim 1 , wherein the conductive material is tungsten.

12. The semiconductor device manufacturing method according to claim 2 , wherein the conductive material is tungsten.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032898/0732 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2010
From: IZAWA, MITSUTAKA
To: ELPIDA MEMORY, INC.
Reel/Frame 024615/0501 →