Photomask having a reduced field size and method of using the same
View Patent ↗A photomask used for manufacturing a semiconductor device includes a substrate; and one or more layers disposed over the substrate, the one or more layers defining a full field area and a reduced field area with a primary pattern being formed in the reduced field area, wherein the full field area is defined by a width of at least 90 mm and a length of at least 100 mm, and the reduced field area is defined by a width within the range of approximately 20-80 mm and a length within the range of approximately 20-80 mm, a center point of the primary patterned area being spaced a predetermined distance from a center point of the photomask so that the primary patterned area avoids photomask defects.
1. A photomask used for manufacturing a semiconductor device comprising:
a substrate;
one or more layers disposed over the substrate that define one or more dies;
a full field area comprising the one or more dies; and
a reduced field area disposed within and reduced in size relative to the full field area and comprising a sub-set of the one or more dies, each die within the sub-set of the one or more dies comprising a corresponding pattern of an integrated circuit that is transferred to a semiconductor wafer and each die that is outside the sub-set of the one or more dies being un-patterned, wherein portions of the full field area outside the reduced field area contain defects and the reduced field area is devoid of defects and is defined by a width within the range of approximately 20-60 mm and a length within the range of approximately 20-70 mm, a center point of the reduced field area being offset from a center point of the photomask so that the full field area avoids photomask defects.
2. The photomask of claim 1 , wherein the width of the reduced field area is within the range of approximately 40-60 mm.
3. The photomask of claim 1 , wherein the width of the reduced field area is approximately 60 mm.
4. The photomask of claim 1 , wherein the length of the reduced field area is within the range of approximately 40-70 mm.
5. The photomask of claim 1 , wherein the length of the reduced field area is within the range of approximately 40-60 mm.
6. The photomask of claim 1 , wherein the length of the reduced field area is approximately 20 mm.
7. The photomask of claim 1 , wherein the one or more layers comprise at least one antireflective layer.
8. The photomask of claim 1 , wherein the one or more layers comprise at least one opaque layer.
9. The photomask of claim 1 , wherein the one or more layers comprise at least one partially transparent layer.
10. The photomask of claim 1 , wherein the photomask is structured so as to be useful at a wavelength of 365 nm, 257 nm, 248 nm, 193 nm, or EUV within the range of approximately 13.5 nm-13.6 nm.
11. The photomask of claim 1 , wherein the photomask is structured so as to be useful at technology nodes of 130 nm and below.
12. A method of forming a semiconductor device, comprising the steps of:
providing a photomask comprising a substrate and one or more layers disposed over the substrate that define one or more dies, a full field area comprising the one or more dies and a reduced field area disposed within and reduced in size relative to the full field area and comprising a sub-set of the one or more dies, each die within the sub-set of the one or more dies comprising a corresponding pattern of an integrated circuit that is transferred to a semiconductor wafer and each die that is outside the sub-set of the one or more dies being un-patterned, wherein portions of the fill field area outside the reduced field area contain defects and the reduced field area is devoid of defects and is defined by a width within the range of approximately 20-60 mm and a length within the range of approximately 20-70 mm. a center point of the reduced field area being offset from a center point of the photomask so that the full field area avoids photomask defects;
interposing the photomask between a semiconductor wafer and an energy source;
generating energy in the energy source;
transmitting the generated energy through the reduced field area of the photomask; and
etching an image on the semiconductor wafer corresponding to a pattern formed by the energy transmitted through the photomask.
13. The method of claim 12 , wherein the wavelength of the generated energy is 365 nm, 257 nm, 248 nm, 193 nm, or EUV within the range of approximately 13.5 nm-13.6 nm.
14. The method of claim 12 , wherein the wavelength of the generated energy is 257 nm.
15. The method of claim 12 , wherein the generated energy is EUV having a wavelength within the range of approximately 13.5 nm-13.6 nm.
16. The method of claim 12 , wherein the width of the reduced field area is within the range of approximately 40-60 mm.
17. The method of claim 12 , wherein the width of the reduced field area is approximately 60 mm.
18. The method of claim 12 , wherein the length of the reduced field area is within the range of approximately 40-70 mm.
19. The method of claim 12 , wherein the length of the reduced field area is within the range of approximately 40-60 mm.
20. The method of claim 12 , wherein the length of the reduced field area is approximately 20 mm.
21. The method of claim 12 , wherein the one or more layers comprise at least one antireflective layer.
22. The method of claim 12 , wherein the one or more layers comprise at least one opaque layer.
23. The method of claim 12 , wherein the one or more layers comprise at least one partially transparent layer.