IP Library Granted Patent US 8,288,061
Granted Patent B2
US 8,288,061 · App. 12/826,082 · Granted Oct 16, 2012

Reticle and manufacturing method of solid-state image sensor

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,288,061
App. No.
12/826,082
Granted
Oct 16, 2012
Kind
B2
Abstract

A reticle includes: a repetition pattern; and a peripheral pattern. One of the repetition pattern and peripheral pattern is a first pattern with a first side in a first direction and the other is a second pattern with a second side in the first direction. The first side has a first length equal to or longer than a second length of the second side. The first length is n (n is an integer equal to or larger than 1) times as large as the second length. The first pattern has at least one of first misalignment measurement patterns provided at positions distant by a third length and ((the third length)+(n−1)×(the second length)) from an upper end of the first pattern. The third length is equal to or smaller than the second length. The second pattern has a second misalignment measurement pattern provided at a position distant by the third length from an upper end of the second pattern.

Claims (32)

1. A reticle comprising:

a repetition pattern; and

a peripheral pattern,

wherein one of said repetition pattern and peripheral pattern is a first pattern with a first side in a first direction and the other is a second pattern with a second side in said first direction, said first side having a first length equal to or longer than a second length of said second side,

wherein said first length is n (n is an integer equal to or larger than 1) times as large as said second length,

wherein said first pattern has at least one of first misalignment measurement patterns provided at positions distant by a third length and ((said third length)+(n−1)×(said second length)) from an upper end of said first pattern, said third length being equal to or smaller than said second length, and

wherein said second pattern has a second misalignment measurement pattern provided at a position distant by said third length from an upper end of said second pattern.

2. The reticle according to claim 1 , wherein said n is one of 1 and 2.

3. The reticle according to claim 1 , wherein a length of a virtual exposure shot in said first direction is said second length at a time of an automatic misalignment measurement.

4. The reticle according to claim 1 , wherein said repetition pattern includes:

a first pattern representing a pixel portion of a CCD (Charge Coupled Device),

wherein said peripheral pattern includes:

a second pattern representing a peripheral circuit portion of said CCD.

5. The reticle according to claim 4 , wherein said second pattern includes:

patterns representing an input circuit portion and an output circuit portion.

6. The reticle according to claim 1 , wherein said first side and said second side are aligned in said first direction.

7. A method of manufacturing a solid-state image sensor, comprising:

setting a wafer and a reticle to an exposing instrument, wherein said reticle includes:

a repetition pattern representing a pixel portion of a CCD (Charge Coupled Device), and

a peripheral pattern representing a peripheral circuit portion of said CCD,

wherein one of said repetition pattern and peripheral pattern is a first pattern with a first side in a first direction and the other is a second pattern with a second side in said first direction, said first side having a first length equal to or longer than a second length of said second side,

wherein said first length is n (n is an integer equal to or larger than 1) times as large as said second length,

wherein said first pattern has at least one of first misalignment measurement patterns provided at positions distant by a third length and ((said third length)+(n−1)×(said second length)) from an upper end of said first pattern, said third length being equal to or smaller than said second length, and

wherein said second pattern has a second misalignment measurement pattern provided at a position distant by said third length from an upper end of said second pattern;

blinding said peripheral pattern and exposing said repetition portion multiple times on said wafer;

blinding said repetition portion and exposing said peripheral pattern on said wafer; and

carrying out an automatic misalignment measurement using said at least one of first misalignment measurement patterns and said second misalignment measurement pattern.

8. The method of manufacturing a solid-state image sensor according to claim 7 , wherein said n is one of 1 and 2.

9. The method of manufacturing a solid-state image sensor according to claim 7 , wherein a length of a virtual exposure shot in said first direction is said second length at a time of carrying out said automatic misalignment measurement.

10. The method of manufacturing a solid-state image sensor according to claim 7 , wherein said peripheral pattern includes:

patterns representing an input circuit portion and an output circuit portion.

11. The method of manufacturing a solid-state image sensor according to claim 7 , wherein said first side and said second side are aligned in said first direction.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0916 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2010
From: MORIYA, TARO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024617/0872 →
Priority Claims (1)
JP 2009-165750 · Jul 14, 2009 · national
Continuity (1)
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