IP Library Granted Patent US 8,461,656
Granted Patent B2
US 8,461,656 · App. 12/827,848 · Granted Jun 11, 2013

Device structures for in-plane and out-of-plane sensing micro-electro-mechanical systems (MEMS)

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Quick Facts
Patent No.
US 8,461,656
App. No.
12/827,848
Granted
Jun 11, 2013
Kind
B2
Abstract

A device structure is made using a first conductive layer over a first wafer. An isolated conductive region is formed in the first conductive layer surrounded by a first opening in the conductive layer. A second wafer has a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer. The insulating layer is attached to the isolated conductive region. The conductive substrate is thinned to form a second conductive layer. A second opening is formed through the second conductive layer and the first insulating layer to the isolated conductive region. The second opening is filled with a conductive plug wherein the conductive plug contacts the isolated conductive region. The second conductive region is etched to form a movable finger over the isolated conductive region. A portion of the insulating layer under the movable finger is removed.

Claims (43)

1. A device structure, comprising:

a substrate,

a first insulating layer on the substrate;

a conductive layer having an isolated conductive region separated from a remaining portion of the conductive layer by an opening in the conductive layer that surrounds the isolated conductive region;

a second insulating layer over the isolated conductive region having an opening over the isolated conductive region;

a movable conductive finger over the opening in the second insulating layer that forms a first capacitor with the isolated conductive region that varies in capacitance based on movement of the movable conductive finger;

conductive polysilicon running directly from a location on the isolated conductive region to a bonding feature above a top surface of the device structure, wherein the conductive polysilicon is orthogonal to a top surface of the isolated conductive region, wherein the bonding feature in contact with a cap wafer in which the cap wafer has an electrode over the movable finger to form a capacitance with the movable finger that varies inversely with variations in the capacitance of the first capacitor due to movement of the movable finger.

2. The device structure of claim 1 , wherein the movable finger comprises polysilicon.

3. The device structure of claim 2 , wherein the bonding feature comprises a first structure comprising germanium and a second structure comprising polysilicon.

4. The device structure of claim 3 , wherein the movable finger has a top surface at the top surface of the device structure.

5. The device structure of claim 1 , further comprising a plurality of movable fingers over the opening in the second insulating layer.

6. A semiconductor structure, comprising:

a first conductive layer formed over a first wafer;

an isolated conductive region formed in the first conductive layer surrounded by a first opening in the first conductive layer;

a second wafer comprising a first insulating layer and a conductive substrate, wherein the conductive substrate has a first major surface adjacent to the first insulating layer;

the first insulating layer attached to the isolated conductive region;

a thinned area of the conductive substrate that forms a second conductive layer;

a second opening formed through the second conductive layer and the first insulating layer to the isolated conductive region;

the second opening filled with a conductive plug wherein the conductive plug contacts the isolated conductive region;

the second conductive region configured to form a movable portion of the semiconductor structure over the isolated conductive region; and

a portion of the first insulating layer is removed under the movable portion of the semiconductor structure.

7. The structure of claim 6 , further comprising a plurality of movable fingers formed as the movable portion of the device structure over the isolated conductive region.

8. The structure of claim 7 , wherein:

each of the second conductive layer and the conductive plug comprises polysilicon;

the second conductive layer has a second major surface.

9. The structure of claim 8 further comprising an oxide layer over the second conductive layer and the conductive plug.

10. The structure of claim 9 further comprising an adhesion contact in contact with the conductive plug.

11. The structure of claim 10 further comprising the adhesion contact is in contact with a cap wafer that includes a conductive layer aligned to the plurality of movable fingers.

12. The structure of claim 10 , further comprising:

a second portion of the oxide layer spaced away from the conductive plug; and

a bonding feature formed over the conductive plug and extending over a portion of the second portion of the oxide layer.

13. The structure of claim 12 , further comprising a first conductive portion under the bonding feature and a second conductive portion where a third portion of the oxide layer was removed.

14. The structure of claim 13 further comprising the bonding feature and the first conductive portion contacting a contact on the cap wafer, wherein the cap wafer includes a conductive layer aligned to the plurality of movable fingers.

15. The structure of claim 14 wherein the contact, the conductive layer of the cap wafer, and the plurality of movable fingers are coupled to a sense circuitry.

16. A semiconductor device, comprising:

a first insulating layer formed over a semiconductor substrate;

a conductive polysilicon layer formed over the first insulating layer;

an opening in the conductive polysilicon layer surrounding a first portion of the conductive polysilicon layer;

a conductive silicon layer formed over the conductive polysilicon layer, wherein the conductive silicon layer is separated from the conductive polysilicon layer by a second insulating layer;

an opening extending orthogonally from a top surface of the first portion of the conductive polysilicon layer through the conductive silicon layer and the second insulating layer;

the opening in the silicon layer and the second insulating layer are filled with conductive polysilicon;

the conductive silicon layer is configured with a plurality of movable fingers over the first portion of the conductive polysilicon layer; and

the second insulating layer is removed under the plurality of movable fingers.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2010
From: PARK, WOO TAE; KARLIN, LISA H.; LIU, LIANJUN; LORECK, HEINZ; DESAI, HEMANT D.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 024619/0709 →