IP Library Granted Patent US 8,174,068
Granted Patent B2
US 8,174,068 · App. 12/832,736 · Granted May 8, 2012

Semiconductor device having vertical transistor, manufacturing method thereof, and data processing system

Assignee: Elpida Memory, Inc.
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Quick Facts
Patent No.
US 8,174,068
App. No.
12/832,736
Granted
May 8, 2012
Kind
B2
Abstract

A semiconductor device includes: a semiconductor substrate; a silicon pillar provided perpendicularly to a main surface of the semiconductor substrate; a gate dielectric film that covers a portion of a side surface of the silicon pillar; an insulator pillar that covers remaining portions of the side surface of the silicon pillar; a gate electrode that covers the silicon pillar via the gate dielectric film and the insulator pillar; an interlayer dielectric film provided above the silicon pillar, the gate dielectric film, the insulator pillar, and the gate electrode; and a gate contact plug embedded in a contact hole provided in the interlayer dielectric film, and in contact with the gate electrode and the insulator pillar. A film thickness of the insulator pillar in a lateral direction is thicker than a film thickness of the gate dielectric film in a lateral direction.

Claims (33)

1. A semiconductor device comprising:

a semiconductor substrate having a main surface;

a silicon pillar having first and second side surfaces that are substantially perpendicular to the main surface of the semiconductor substrate;

a gate dielectric film that covers the first side surface of the silicon pillar;

an insulator pillar that covers the second side surface of the silicon pillar;

a gate electrode having a first portion that covers the first side surface of the silicon pillar via the gate dielectric film and a second portion that covers the insulator pillar;

an interlayer dielectric film provided above the silicon pillar, the gate dielectric film, the insulator pillar, and the gate electrode; and

a gate contact plug that is embedded in a first contact hole provided in the interlayer dielectric film and is in contact with the second portion of the gate electrode,

wherein a film thickness of the insulator pillar in a direction parallel to the main surface of the semiconductor substrate is thicker than a film thickness of the gate dielectric film in the direction.

2. The semiconductor device as claimed in claim 1 , wherein the insulator pillar is a vapor-phase-grown film, and the gate dielectric film is a thermally oxidized film.

3. The semiconductor device as claimed in claim 1 , further comprising:

a first diffusion layer and a second diffusion layer formed at an upper part and a lower part of the silicon pillar, respectively;

a first diffusion-layer contact plug that is embedded in a second contact hole provided in the interlayer dielectric film and is in contact with the first diffusion layer; and

a second diffusion-layer contact plug that is embedded in a third contact hole provided in the interlayer dielectric film and is in contact with the second diffusion layer.

4. The semiconductor device as claimed in claim 3 , wherein the first diffusion layer comprises an epitaxial layer formed on an upper surface of the silicon pillar.

5. The semiconductor device as claimed in claim 4 , further comprising a sidewall dielectric film having a third portion provided between the first portion of the gate electrode and the epitaxial layer.

6. The semiconductor device as claimed in claim 5 , wherein the sidewall dielectric film further has a fourth portion that is in contact with the second portion of the gate electrode.

7. The semiconductor device as claimed in claim 6 , wherein the fourth portion of sidewall dielectric film is in contact with the gate contact plug.

8. The semiconductor device as claimed in claim 5 , wherein the sidewall dielectric film comprises a different material from the interlayer dielectric film.

9. The semiconductor device as claimed in claim 8 , wherein the sidewall dielectric film comprises a silicon nitride.

10. A semiconductor device comprising:

a semiconductor substrate having a main surface;

a silicon pillar having a side surface that is substantially perpendicularly to the main surface of the semiconductor substrate;

an insulation film that covers the side surface of the silicon pillar;

a gate electrode that covers the side surface of the silicon pillar via the insulation film;

an interlayer dielectric film provided above the silicon pillar, the insulation film, and the gate electrode; and

a gate contact plug that is embedded in a contact hole provided in the interlayer dielectric film and in contact with the gate electrode, wherein

a film thickness of a first portion of the insulation film intervening between the silicon pillar and a portion of the gate electrode in contact with the gate contact plug is thicker than a film thickness of a second portion of the insulation film intervening between the silicon pillar and another portion of the gate electrode not in contact with the gate contact plug.

11. The semiconductor device as claimed in claim 10 , wherein the first portion of the insulation film is a vapor-phase-grown film, and the second portion of the insulation film is a thermally oxidized film.

12. The semiconductor device as claimed in claim 10 , further comprising:

a first diffusion layer and a second diffusion layer formed at an upper part and a lower part of the silicon pillar, respectively;

a first diffusion-layer contact plug that is embedded in a contact hole provided in the interlayer dielectric film and is in contact with the first diffusion layer; and

a second diffusion-layer contact plug that is embedded in a contact hole provided in the interlayer dielectric film and is in contact with the second diffusion layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032901/0196 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2010
From: NOJIMA, KAZUHIRO
To: ELPIDA MEMORY, INC.
Reel/Frame 024655/0030 →
Priority Claims (1)
JP 2009-166017 · Jul 14, 2009 · national
Continuity (1)
Related Publication 20110012193A1 · Jan 20, 2011