IP Library Granted Patent US 8,481,406
Granted Patent B2
US 8,481,406 · App. 12/837,326 · Granted Jul 9, 2013

Methods of forming bonded semiconductor structures

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Quick Facts
Patent No.
US 8,481,406
App. No.
12/837,326
Granted
Jul 9, 2013
Kind
B2
Abstract

Methods of forming bonded semiconductor structures include temporarily, directly bonding together semiconductor structures, thinning at least one of the semiconductor structures, and subsequently permanently bonding the thinned semiconductor structure to another semiconductor structure. The temporary, direct bond may be established without the use of an adhesive. Bonded semiconductor structures are fabricated in accordance with such methods.

Claims (49)

1. A method of forming a bonded semiconductor structure, comprising:

temporarily bonding a first semiconductor structure to a second semiconductor structure by providing direct atomic or molecular bonds between a bonding surface of the first semiconductor structure and a bonding surface of the second semiconductor structure;

selecting the first semiconductor structure to have an active surface on a first side of the first semiconductor structure and a back surface on a second, opposite side of the first semiconductor structure and to comprise at least one device structure formed over a substrate;

thinning the substrate of the first semiconductor structure by removing material of the substrate from the back surface of the first semiconductor structure;

permanently bonding the back surface of the first semiconductor structure to a surface of a third semiconductor structure after thinning the substrate of the first semiconductor structure and while the first semiconductor structure remains temporarily bonded to the second semiconductor structure; and

separating the second semiconductor structure from the first semiconductor structure.

2. The method of claim 1 , further comprising selecting the first semiconductor structure to include at least one through wafer interconnect, and wherein thinning the substrate of the first semiconductor structure comprises exposing at least a portion of the at least one through wafer interconnect through the back surface of the first semiconductor structure, and wherein permanently bonding the back surface of the first semiconductor structure to a surface of the third semiconductor structure comprises electrically interconnecting the at least one through wafer interconnect with at least one conductive structure of the third semiconductor structure.

3. The method of claim 1 , further comprising forming at least one through wafer interconnect through the first semiconductor structure and electrically interconnecting the at least one through wafer interconnect with at least one conductive structure of the third semiconductor structure after permanently bonding the back surface of the first semiconductor structure to the surface of the third semiconductor structure.

4. The method of claim 1 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises temporarily bonding the first semiconductor structure to the second semiconductor structure without using an adhesive between the first semiconductor structure and the second semiconductor structure.

5. The method of claim 4 , wherein providing direct atomic or molecular bonds between the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure comprises providing direct atomic or molecular bonds between at least one of silicon oxide, silicon nitride and germanium oxide, and at least one of silicon, germanium, silicon oxide, silicon nitride and germanium oxide.

6. The method of claim 1 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises:

forming each of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of about two nanometers (2 nm) or less;

abutting the bonding surface of the first semiconductor structure against the bonding surface of the second semiconductor structure; and

maintaining the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure at a temperature of between about two hundred degrees Celsius (200° C.) and about four hundred degrees Celsius (400° C.) for a time of between about two minutes (2 min) and about fifteen hours (15 hr).

7. The method of claim 6 , further comprising maintaining a pressure between the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure of between about 0.14 MPa and about 1.43 MPa while maintaining the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure at the temperature of between about two hundred degrees Celsius (200° C.) and about four hundred degrees Celsius (400° C.) for the time of between about two minutes (2 min) and about fifteen hours (15 hr).

8. The method of claim 6 , further comprising activating at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure prior to abutting the bonding surface of the first semiconductor structure against the bonding surface of the second semiconductor structure.

9. The method of claim 1 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises forming a bonded interface area between the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure that is about eighty percent (80%) or less of the total area between the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure along a bonding interface therebetween.

10. The method of claim 9 , further comprising forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

11. The method of claim 10 , wherein forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure comprises:

forming the plurality of recesses in a pattern on one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure; and

selecting the pattern to comprise a mirror image of another pattern of metallic features on the other of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

12. The method of claim 10 , wherein forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure comprises:

depositing a first dielectric material over a second dielectric material on at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure;

selecting the first dielectric material to comprise a low-temperature dielectric material that will undergo at least one of degradation, decomposition, and out-gassing upon heating the low-temperature dielectric material to a known temperature below about four hundred degrees Celsius (400° C.); and

forming the plurality of recesses through at least a portion of the first dielectric material.

13. The method of claim 12 , further comprising heating the low-temperature dielectric material to a temperature above the known temperature to weaken a bond between the low-temperature dielectric material and another material.

14. The method of claim 1 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises forming at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of between about one-quarter of a nanometer (0.25 nm) and about two nanometers (2.0 nm).

15. The method of claim 14 , wherein forming at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of between about one-quarter of a nanometer (0.25 nm) and about two nanometers (2.0 nm) comprises forming each of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of between about one-half of a nanometer (0.5 nm) and about one nanometer (1.0 nm).

16. A method of forming a semiconductor structure, comprising:

temporarily bonding a first semiconductor structure to a second semiconductor structure without using an adhesive between a bonding surface of the first semiconductor structure and a bonding surface of the second semiconductor structure;

selecting the first semiconductor structure to have an active surface on a first side of the first semiconductor structure and a back surface on a second, opposite side of the first semiconductor structure and to comprise at least one device structure formed over a substrate;

permanently bonding the back surface of the first semiconductor structure to a surface of a third semiconductor structure while the first semiconductor structure remains temporarily bonded to the second semiconductor structure; and

separating the second semiconductor structure from the first semiconductor structure.

17. The method of claim 16 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises:

forming each of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of about two nanometers (2 nm) or less;

abutting the bonding surface of the first semiconductor structure against the bonding surface of the second semiconductor structure; and

maintaining the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure at a temperature of between about two hundred degrees Celsius (200° C.) and about four hundred degrees Celsius (400° C.) for a time of between about two minutes (2 min) and about fifteen hours (15 hr).

18. The method of claim 16 , further comprising activating at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

19. The method of claim 16 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises forming a bonding interface area between the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure that is about eighty percent (80%) or less of the total surface area of at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

20. The method of claim 19 , further comprising forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

21. The method of claim 20 , wherein forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure comprises:

forming the plurality of recesses in a pattern on one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure; and

selecting the pattern to comprise a mirror image of another pattern of metallic features on the other of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure.

22. The method of claim 20 , wherein forming a plurality of recesses in at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure comprises:

depositing a first dielectric material over a second dielectric material on at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure;

selecting the first dielectric material to comprise a low-temperature dielectric material that will undergo at least one of degradation, decomposition, and out-gassing upon heating the low-temperature dielectric material to a known temperature below about four hundred degrees Celsius (400° C.); and

forming the plurality of recesses through at least a portion of the first dielectric material.

23. The method of claim 22 , further comprising heating the low-temperature dielectric material to a temperature above the known temperature to weaken a bond between the low-temperature dielectric material and another material.

24. The method of claim 16 , wherein temporarily bonding the first semiconductor structure to the second semiconductor structure comprises forming at least one of the bonding surface of the first semiconductor structure and the bonding surface of the second semiconductor structure to have a surface roughness of between about one-quarter of a nanometer (0.25 nm) and about two nanometers (2.0 nm).

Assignments (2)
CHANGE OF NAME Recorded Feb 28, 2012
From: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES; CHEMIN DES FRANQUES; PARC TECHNOLOGIES DES FONTAINES; BERNIN. FRANCE 38190
To: SOITEC
Reel/Frame 028138/0895 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2010
From: SADAKA, MARIAM; RADU, IONUT
To: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
Reel/Frame 024908/0479 →