IP Library Granted Patent US 8,173,447
Granted Patent B2
US 8,173,447 · App. 12/851,275 · Granted May 8, 2012

Magnetoresistive element and magnetic memory

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Quick Facts
Patent No.
US 8,173,447
App. No.
12/851,275
Granted
May 8, 2012
Kind
B2
Abstract

A magnetoresistive element includes: a magnetization free layer having a first plane and a second plane located on the opposite side from the first plane, and having a variable magnetization direction; a magnetization pinned layer provided on the first plane side of the magnetization free layer, and having a pinned magnetization direction; a first tunnel barrier layer provided between the magnetization free layer and the magnetization pinned layer; a second tunnel barrier layer provided on the second plane of the magnetization free layer; and a non-magnetic layer provided on a plane on the opposite side of the second tunnel barrier layer from the magnetization free layer. The magnetization direction of the magnetization free layer is variable by applying current between the magnetization pinned layer and the non-magnetic layer, and a resistance ratio between the first tunnel barrier layer and the second tunnel barrier layer is in a range of 1:0.25 to 1:4.

Claims (15)

1. A method for manufacturing a magnetoresistive element comprising:

forming a lower electrode film on a substrate;

forming a stacked film on the lower electrode film, the stacked film comprising a first magnetic layer to be a magnetization fixed layer having a fixed magnetization direction, a tunnel barrier layer, and a second magnetic layer to be a magnetization free layer having a changeable magnetization direction;

forming a first upper electrode film on the stacked film;

patterning the first upper electrode film to form a first upper electrode;

patterning the stacked film with the first upper electrode serving as a mask;

forming an insulating film to cover the first upper electrode;

exposing an upper face of the first upper electrode;

forming a second upper electrode film to cover the first upper electrode;

patterning the second upper electrode film to form a second upper electrode; and

patterning the lower electrode film to form a lower electrode with the second upper electrode serving as a mask after forming the first and second upper electrodes.

2. The method according to claim 1 , wherein exposing of the upper face of the first upper electrode comprises polishing the insulating film to expose the upper face of the first upper electrode.

3. The method according to claim 1 , wherein the second upper electrode has a plane area larger than that of the first upper electrode.

4. The method according to claim 1 , wherein the tunnel barrier layer is formed of MgO.

5. The method according to claim 1 , wherein patterning of the stacked film comprises patterning the second magnetic layer.

Assignments (3)
DE-MERGER Recorded Dec 12, 2019
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051260/0291 →
MERGER Recorded Dec 12, 2019
From: TOSHIBA MEMORY CORPORATION; K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051262/0776 →
CHANGE OF NAME AND ADDRESS Recorded Dec 12, 2019
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 051262/0881 →