Circuitized substrates utilizing smooth-sided conductive layers as part thereof
View Patent ↗A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.
1. An electrical assembly comprising:
a circuitized substrate including at least one dielectric layer having first and second opposite sides, first and second electrically conductive layers each having a first smooth side having a thin organic layer thereon for preserving roughness and enhancing adhesion bonded to said first and second opposite sides of said at least one dielectric layer, respectively, a second micro-etched smooth side opposite said first smooth side, and a circuit pattern formed within at least one of said electrically conductive layers having said first smooth side and said second micro-etched smooth side; and
at least one electrical component positioned on and electrically coupled to said circuitized substrate.
2. The electrical assembly of claim 1 wherein said at least one electrical component comprises a semiconductor chip and said circuitized substrate is a chip carrier substrate.
3. The electrical assembly of claim 1 wherein said thin organic layer on said first smooth side of said first and second electrically conductive layers comprises benzotriazole and has a thickness of from about 50 Angstroms to about 500 Angstroms.
4. The electrical assembly of claim 1 wherein said at least one dielectric layer is an organic dielectric material selected from the group of polymer materials consisting of fiberglass-reinforced epoxy resins, polytetrafluoroethylene, polyimides, polyamides, cyanate resins, polyphenylene ether resins, photoimageable materials, and combinations thereof.
5. The electrical assembly of claim 1 wherein said first and second electrically conductive layers are comprised of copper or copper alloy material.
6. The electrical assembly of claim 5 wherein said copper or copper alloy material is electrodeposited copper.
7. The electrical assembly of claim 1 further including additional dielectric and electrically conductive layers on opposite sides of said circuitized substrate having said at least one dielectric layer and said first and second electrically conductive layers, and a circuit pattern within selected ones of said additional electrically conductive layers.
8. The electrical assembly of claim 7 wherein the total number of dielectric layers and electrically conductive layers within said circuitized substrate is greater than ten.
9. The electrical assembly of claim 1 , wherein said assembly forms a portion of an information handling system.
10. An information handling system comprising:
a housing:
a circuitized substrate including at least one dielectric layer having first and second opposite sides, first and second electrically conductive layers each having a first smooth side having a thin organic layer thereon for preserving roughness and enhancing adhesion bonded to said first and second opposite sides of said at least one dielectric layer, respectively, a second micro-etched smooth side opposite said first smooth side, and a circuit pattern formed within at least one of said electrically conductive layers having said first smooth side and said second micro-etched smooth side; and
at least one electrical component positioned on and electrically coupled to said circuitized substrate.
11. The invention of claim 10 wherein said information handling system comprises a personal computer.
12. The invention of claim 10 wherein said information handling system comprises a mainframe computer.
13. The invention of claim 10 wherein said information handling system comprises a computer server.