IP Library Granted Patent US 8,021,899
Granted Patent B2
US 8,021,899 · App. 12/855,906 · Granted Sep 20, 2011

Method of manufacturing a semiconductor device including optical test pattern above a light shielding film

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,021,899
App. No.
12/855,906
Granted
Sep 20, 2011
Kind
B2
Abstract

The semiconductor device of the present invention includes a first insulating film on a substrate having a first region and a second region, a light shielding film formed in the first region and an interconnect film formed in the second region in the first insulating film and a second insulating film having a first concave portion above the light shielding film in the first region and an interconnect hole having a via hole and a second concave portion in the second region in the second insulating film on the first insulating film, wherein an area of the light shielding film is overlapping an area of the first plurality of concave portions.

Claims (15)

1. A method of manufacturing a semiconductor device, comprising:

forming a first insulating film on a substrate where a plurality of active regions and a plurality of test regions are formed;

forming a light shielding film in the test regions and an interconnect film in the active regions in the first insulating film;

forming a second insulating film on the first film; and

forming an optical test pattern above the light shielding film in the second insulating film and in the test regions, and an interconnect hole having a via hole and device components in the active regions in the second insulating film,

wherein the light shielding film extends continuously in an area underlying the optical test pattern.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

irradiating light onto the optical test pattern in the second insulating film;

detecting reflected light; and

acquiring a shape of the optical test pattern from the detected reflected light.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein the test regions are included in a scribe region.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the area of the light shielding film is an area of the circle of 2 μm or more in the radius.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the device components and the optical test pattern includes trenches being formed at a same etching step.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein the device components and the optical test pattern includes holes being formed at a same etching step.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the light shielding film and the interconnect film are formed of copper or copper alloy.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Aug 17, 2011
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 026761/0572 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2010
From: NAMBU, HIDETAKA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024834/0067 →
Priority Claims (1)
JP 2007-309937 · Nov 30, 2007 · national
Continuity (2)
Division 12323614 · Nov 26, 2008
Related Publication 20100304508A1 · Dec 2, 2010