System and method of processing CDMA signals
Methods and apparatus for performing finger de-spreading and MRC combining are provided. A large antenna buffer is used to buffer all the finger signals of the same user so that the receiver can do both de-spreading and MRC at the same time without buffering the de-spreading finger symbols. For each user, a reference time is introduced to align all the finger signals of the same user in the Antenna Buffer. The reference time delay is used to generate the PN codes for de-spreading, as well as to count the number of symbols in a PCG or a frame. Methods for antenna buffer arrangement, interpolating filter implementation, channel estimation and MRC for traffic data channels, timing for the user's finger signal de-spreading and MRC, long code and short code generation for de-spreading, new finger allocation and finger timing adjustment.
1. A system comprising:
a first processor that performs combined finger de-spreading and MRC (maximum ratio combining) combining to generate channel symbols;
a symbol buffer that stores the channel symbols;
a second processor that reads channel symbols from the symbol buffer using direct memory access and performs decoding on the channel symbols;
wherein the symbol buffer is implemented as a pair of buffers for each channel;
for a selected buffer which alternates between the buffers of the pair of buffers, the first processor writes to the selected buffer with an offset address which compensates for a difference between system time and a reference time for the channel until the selected buffer is full;
wherein the second processor reads symbols from the symbol buffer using direct memory access and performs decoding on the channel symbols using the buffer of the pair of buffers other than the selected buffer.
2. A system according to claim 1 further comprising:
a global chip counter referenced to the system time (system time (in chips));
wherein for each channel, the offset address of a first channel symbol is determined as follows:
offset
address
=
(
system
time
(
in
chips
)
-
R
E
F
T
D
(
in
chips
)
)
mod
(
buffer
size
×
2
)
spreading
factor
(
EQ
1
)
where REFTD is a reference time delay defined for each user, and where buffer size is the size of one of the pair of buffers.
3. A system according to claim 2 wherein the buffer size is selected to store channel symbols during 1536 chips.
4. A system according to claim 2 wherein there is a maximum spreading factor used for MRC combining; and wherein if the traffic channel spreading factor is greater than the maximum spreading factor used in the first processor, the second processor is adapted to accumulate consecutive channel symbols read from the buffer to make the spreading factor.
5. A method comprising:
for each of a plurality of users, performing channel estimation, de-spreading and MRC combining directly upon contents of an antenna buffer without buffering de-spread symbols, with an antenna buffer that is sized to accommodate a delay spread between fingers of a single user.
6. A method comprising:
using a first processor, performing combined finger de-spreading and MRC (maximum ratio combining) combining to generate channel symbols;
storing the channel symbols in a symbol buffer comprising a pair of buffers for each channel;
using a second processor, reading channel symbols from the symbol buffer using direct memory access and performing decoding on the channel symbols;
the first processor writing to a selected buffer which alternates between the buffers of the pair of buffers, with an offset address which compensates for a difference between system time and a reference time for the channel until the selected buffer is full;
the second processor reading channel symbols from the symbol buffer using direct memory access and performing decoding on the channel symbols using the buffer of the pair of buffers other than the selected buffer.
7. A method according to claim 6 further comprising:
running a global chip counter referenced to the system time (system time (in chips));
for each channel, determining the offset address of a first channel symbol according to:
offset
address
=
(
system
time
(
in
chips
)
-
R
E
F
T
D
(
in
chips
)
)
mod
(
buffer
size
×
2
)
spreading
factor
(
EQ
1
)
where REFTD is a reference time delay defined for each user, and where buffer size is the size of one of the pair of buffers.
8. A method according to claim 7 wherein the buffer size is selected to store channel symbols during 1536 chips.
9. A method according to claim 7 wherein there is a maximum spreading factor used for MRC combining; and wherein if the traffic channel spreading factor is greater than the maximum spreading factor used in the first processor, the method further comprising:
the second processor accumulating consecutive channel symbols read from the buffer to make the spreading factor.