Comparator circuit with hysteresis, test circuit, and method for testing
View Patent ↗A comparator has a first input, a second input, an output, a control electrode of a first hysteresis transistor coupled to the output, and a control electrode of a second hysteresis transistor coupled to the output. A method for testing the comparator includes: reconfiguring the comparator to be an amplifier with unity gain feedback; providing an input voltage to the input; providing a first voltage to the first hysteresis transistor to provide a first offset voltage; measuring a first output voltage at the output; removing the first voltage from the first hysteresis transistor; providing the first voltage to the second hysteresis transistor; and measuring a second output voltage at the output.
1. In a comparator having a first input, a second input, an output, a first hysteresis transistor having a control electrode coupled to the output, and a second hysteresis transistor having a control electrode coupled to the output, a method for testing the comparator, the method comprising:
reconfiguring the comparator to be an amplifier with unity gain feedback;
providing an input voltage to the first input;
providing a first voltage to the first hysteresis transistor to provide a first offset voltage;
measuring a first output voltage at the output;
removing the first voltage from the first hysteresis transistor;
providing the first voltage to the second hysteresis transistor; and
measuring a second output voltage at the output.
2. The method of claim 1 , wherein reconfiguring the comparator further comprises:
decoupling the control electrode of the first hysteresis transistor from the output;
decoupling the control electrode of the second hysteresis transistor from the output; and
coupling the second input to the output.
3. The method of claim 1 , wherein providing the first voltage to the first hysteresis transistor further comprises providing a second voltage to the second hysteresis transistor, wherein the second voltage is different than the first voltage.
4. The method of claim 3 , wherein the first voltage is characterized as being a positive power supply voltage and the second voltage is zero volts.
5. The method of claim 1 , wherein providing the first voltage to the second hysteresis transistor further comprises providing a second voltage to the first hysteresis transistor, wherein the second voltage is different than the first voltage.
6. The method of claim 1 , wherein providing the input voltage to the input further comprises providing the input voltage from a voltage divider coupled between first and second power supply voltage terminals.
7. The method of claim 6 , wherein the comparator is used in a power-on-reset application.
8. The method of claim 1 , further comprising coupling a compensation capacitor between the output and ground.
9. In a comparator circuit having a first input transistor having a control electrode for receiving an input voltage, a second input transistor having a control electrode for receiving a reference voltage, a current mirror having an input coupled to a second current electrode of the first input transistor, the current mirror having an output, a first hysteresis transistor having a first current electrode coupled to a first current electrode of the first input transistor, a second hysteresis transistor having a first current electrode coupled to a first current electrode of the second input transistor, a control electrode of each of the first and second hysteresis transistors selectively coupled to the output, a method for testing the comparator, the method comprising:
decoupling the control electrodes of the first and second hysteresis transistors from the output;
coupling the control electrode of the second input transistor to the output of the current mirror;
providing a first power supply voltage to the control electrode of the first hysteresis transistor;
providing a second power supply voltage to the control electrode of the second hysteresis transistor, the second power supply voltage being different than the first power supply voltage;
providing an input voltage to the control electrode of the first input transistor;
measuring a first output voltage at the output of the current mirror;
providing the second power supply voltage to the control electrode of the first hysteresis transistor;
providing the first power supply voltage to the control electrode of the second hysteresis transistor; and
measuring a second output voltage at the output of the current mirror.
10. The method of claim 9 , wherein the comparator is used in a power-on-reset circuit.
11. The method of claim 9 , wherein the first power supply voltage is a positive power supply voltage and the second power supply voltage is zero volts.
12. The method of claim 9 , wherein measuring the first output voltage further comprises measuring a high hysteresis threshold voltage of the comparator, wherein measuring the second output voltage further comprises measuring a low hysteresis threshold voltage of the comparator.
13. The method of claim 9 , further comprising coupling a compensation capacitor between the output of the current mirror and a power supply voltage terminal.
14. The method of claim 9 , wherein providing the input voltage to the control electrode of the first input transistor further comprises providing the input voltage from a voltage divider coupled between first and second power supply voltage terminals.
15. A comparator comprising:
a first input transistor having a first current electrode, a second current electrode, and a control electrode for receiving a first input voltage;
a second input transistor having first current electrode, a second current electrode, and a control electrode for receiving a second input voltage;
a current mirror having an input terminal coupled to the first current electrode of the first input transistor, and an output terminal;
a first hysteresis transistor having a first current electrode coupled to the second current electrode of the first input transistor, a second current electrode, and a control electrode;
a second hysteresis transistor having a first current electrode coupled to the second current electrode of the second input transistor, a second current electrode, and a control electrode;
a first switch having a first terminal coupled to the control electrode of the second input transistor, and a second terminal coupled to the output terminal of the current mirror;
a second switch coupled between the control electrode of the first hysteresis transistor and one of either a power supply voltage or a first output voltage from the current mirror; and
a third switch coupled between the control electrode of the second hysteresis transistor and one of either the power supply voltage or a second output voltage from the current mirror.
16. The comparator of claim 15 , further comprising a resistive element having a first terminal coupled to the second current electrode of the first input transistor and a second terminal coupled to the second current electrode of the second input transistor.
17. The comparator of claim 15 , further comprising a voltage divider coupled to the control electrode of the first input transistor for providing the first input voltage.
18. The comparator of claim 15 , further comprising an inverter coupled between the output terminal of the current mirror and a terminal of the third switch.
19. The comparator of claim 15 , further comprising a current source having a first terminal coupled to the second current electrodes of the first and second hysteresis transistors, and a second terminal coupled to a power supply voltage terminal.
20. The comparator of claim 15 , wherein the current mirror comprises:
a first transistor having a first current electrode coupled to a first power supply voltage terminal, and a control electrode and a second current electrode both coupled to the first current electrode of the first input transistor;
a second transistor having a first current electrode coupled to the first power supply voltage terminal, a second current electrode, and a control electrode coupled to the first current electrode of the first input transistor;
a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a second current electrode coupled to a second power supply voltage terminal, and a control electrode;
a fourth transistor having a first current electrode and control electrode both coupled to the control electrode of the third transistor, and a second current electrode coupled to the second power supply voltage terminal;
a fifth transistor having a first current electrode coupled to the first power supply voltage terminal, a control electrode coupled to the first current electrode of the second input transistor, and a second current electrode coupled to the first current electrode of the fourth transistor; and
a sixth transistor having a first current electrode coupled to the first power supply voltage terminal, a control electrode and a second current electrode both coupled to the first current electrode of the second input transistor.