IP Library Granted Patent US 8,377,743
Granted Patent B2
US 8,377,743 · App. 12/874,145 · Granted Feb 19, 2013

Laser annealing of metal oxide semiconductor on temperature sensitive substrate formations

Inventors: Chan-Long Shieh (Paradise Valley, AZ); Hsing-Chung Lee (Calabasas, CA)
Assignee: CBRITE Inc.
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Quick Facts
Patent No.
US 8,377,743
App. No.
12/874,145
Granted
Feb 19, 2013
Kind
B2
Abstract

A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.

Claims (32)

1. A method of annealing an amorphous metal oxide on a temperature sensitive substrate formation comprising the steps of:

providing a temperature sensitive substrate formation;

forming a spacer layer on a surface of the temperature sensitive substrate formation;

forming a metal oxide semiconductor device on the spacer layer, the device including at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a contact metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface; and

improving the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the contact metal layer amorphous by at least partially annealing the layer of amorphous metal oxide semiconductor material by heating the adjacent contact metal layer with pulses of infra red radiation, the pulses being produced by pulsing an infra-red laser to produce breaks or intervals between radiation or pulses of heating, the intervals being longer than the pulses of heating.

2. A method as claimed in claim 1 wherein the temperature sensitive substrate formation includes plastic.

3. A method as claimed in claim 1 wherein the temperature sensitive substrate formation includes a color filter.

4. A method as claimed in claim 1 wherein the step of forming the spacer layer includes forming the spacer layer with a thickness less than 10 microns.

5. A method as claimed in claim 1 wherein the step of improving the mobility and operating stability of the amorphous metal oxide semiconductor material includes controlling the volume carrier concentration in the amorphous metal oxide semiconductor material by controlling oxygen vacancies in the amorphous metal oxide semiconductor material through the heating of the adjacent contact metal layer.

6. A method as claimed in claim 1 wherein the amorphous metal oxide semiconductor device formed includes one of a thin film transistor and a vertical diode.

7. A method as claimed in claim 1 wherein the spacer layer is formed of material capable of withstanding a higher heat than the temperature sensitive substrate formation.

8. A method as claimed in claim 7 wherein the spacer layer is formed of one of SiO 2 , SiN, polyimide, and BCB.

9. A method as claimed in claim 1 wherein the step of heating includes using an infra red semiconductor laser and pulsing the laser to produce radiation or pulses of heating each having a duration of less than 50 nanoseconds.

10. A method as claimed in claim 9 wherein the infra red semiconductor laser breaks or intervals between radiation or pulses of heating are each longer than one micro second.

11. A method as claimed in claim 1 wherein the step of forming the spacer layer includes using a material that is capable of withstanding a temperature in a range of 300° C. to 800° C.

12. A method as claimed in claim 11 wherein the step of heating includes heating the metal contact layer to a temperature in a range of 300° C. to 800° C.

13. A method as claimed in claim 12 wherein the flexible substrate is heated to a temperature less than 150° C.

14. A method as claimed in claim 12 wherein the at least partially annealing step reduces traps in the amorphous metal oxide semiconductor material and the interface.

15. A method as claimed in claim 1 wherein the step of forming a metal oxide semiconductor device includes a step of depositing a metal oxide layer by one of physical vapor deposition and a solution process.

16. A method as claimed in claim 15 wherein the step of depositing the metal oxide layer by physical vapor deposition includes sputtering.

17. A method as claimed in claim 15 wherein the step of depositing the metal oxide layer by solution process includes one of spin coating, dip coating, inkjet printing, screen printing, and Gravure printing.

18. A method of annealing an amorphous metal oxide on a temperature sensitive substrate formation comprising the steps of:

providing a temperature sensitive substrate formation, the temperature sensitive substrate formation being formed of material that is substantially undamaged by temperatures below approximately 150° C.;

forming a spacer layer on a surface of the temperature sensitive substrate formation, the spacer layer including materials that can withstand temperatures in a range of 300° C. to 800° C.;

forming a metal oxide semiconductor device on the spacer layer, the device including at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface, and a conduction area defined in the amorphous metal oxide semiconductor material extending substantially the length of the gate metal layer; and

improving the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining all of the amorphous metal oxide semiconductor material in the conduction area amorphous by at least partially annealing the layer of amorphous metal oxide semiconductor material by heating the gate metal layer with pulses of infra red radiation to a temperature in a range of 300° C. to 800° C., the pulses being produced by pulsing an infra-red laser to produce breaks or intervals between radiation or pulses of heating, the intervals being longer than the pulses of heating.

19. A method as claimed in claim 18 wherein the temperature sensitive substrate formation includes plastic.

20. A method as claimed in claim 18 wherein the temperature sensitive substrate formation includes a color filter.

21. A method as claimed in claim 18 wherein the step of forming the spacer layer includes forming the spacer layer with a thickness less than 10 microns.

22. A method as claimed in claim 18 wherein the metal oxide semiconductor device formed includes one of a thin film transistor and a vertical diode.

23. A method as claimed in claim 18 wherein the step of heating includes using an infra red semiconductor laser and pulsing the laser to produce radiation or pulses of heating each with a duration of less than 50 nanoseconds.

24. A method as claimed in claim 23 wherein the infra red semiconductor laser breaks or intervals between radiation or pulses of heating are each longer than one micro second.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED ON REEL 048069 FRAME 0427. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE BY SECURED PARTY. Recorded Apr 13, 2020
From: FULL STRENGTH GROUP LIMITED
To: ABC SERVICES GROUP, INC., SOLELY IN ITS CAPACITY AS ASSIGNEE FOR THE BENEFIT OF CREDITORS OF CBRITE INC.; CBRITE INC.
Reel/Frame 052384/0832 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED AT REEL: 045653 FRAME: 0823. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 13, 2020
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 052377/0853 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED AT REEL: 045653 FRAME: 0983. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 13, 2020
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 052377/0913 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED ON REEL 049879 FRAME 0645. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Apr 13, 2020
From: ABC SERVICES GROUP, INC.
To: FANTASY SHINE LIMITED
Reel/Frame 052384/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2019
From: ABC SERVICES GROUP, INC.
To: FANTASY SHINE LIMITED
Reel/Frame 049879/0645 →
RELEASE OF SECURITY INTEREST Recorded Jan 14, 2019
From: FULL STRENGTH GROUP LIMITED
To: ABC SERVICES GROUP, INC., SOLELY IN ITS CAPACITY AS ASSIGNEE FOR THE BENEFIT OF CREDITORS OF CBRITE INC.; CBRITE INC.
Reel/Frame 048069/0427 →
SECURITY INTEREST Recorded Mar 20, 2018
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 045653/0823 →
SECURITY INTEREST Recorded Mar 20, 2018
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 045653/0983 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2013
From: SHIEH, CHAN-LONG; LEE, HSING-CHUNG
To: CBRITE, INC.
Reel/Frame 029594/0174 →
Continuity (2)
Continuation In Part 12124420 · May 21, 2008
Related Publication 20110062431A1 · Mar 17, 2011