Protection of a prime number generation against side-channel attacks

1. A method for protecting generation, by an electronic circuit, of a first prime number and a second prime number, the method comprising:

using the electronic circuit for:

for the first prime number, testing a primality of at least one first candidate number with respect to prime numbers of at least one set of consecutive prime numbers; and

for the second prime number, testing a primality of at least one second candidate number with respect to the prime numbers of the at least one set of consecutive prime numbers; wherein:

an order of testing the primality of the at least one first candidate number with respect to the prime numbers of the at least one set of consecutive prime numbers differs from an order of testing the primality of the at least one second candidate number with respect to the prime numbers of the at least one set of consecutive prime numbers;

the at least one second candidate number comprises a plurality of second candidate numbers; and

the order of testing the primality of the plurality of second candidate numbers is modified for each candidate number of the plurality of second candidate numbers.

2. The method of claim 1 , wherein:

the at least one first candidate number comprises a plurality of first candidate numbers; and

said order of testing the primality of the plurality of first candidate numbers is modified for each candidate number of the plurality of first candidate numbers.

3. The method of claim 1 , wherein said order of testing the primality of the at least one first candidate number is sequential with respect to the prime numbers of the at least one set of consecutive prime numbers.

4. The method of claim 1 , wherein said order of testing the primality of the at least one first candidate number is non-sequential with respect to the prime numbers of the at least one set of consecutive prime numbers.

5. The method of claim 1 , wherein said order of testing the primality of the at least one first candidate number is selected randomly with respect to the prime numbers of the at least one set of consecutive prime numbers.

6. The method of claim 1 , wherein said at least one set comprises the prime numbers ranging between a first threshold and a second threshold.

7. The method of claim 1 , wherein each test of primality is a test of divisibility of the candidate number by a prime number of said at least one set.

8. The method of claim 6 , wherein testing the primality of the at least one first candidate number is based on a sieve table comprising as many elements as there are prime numbers in said at least one set, an initial candidate number being obtained by multiplying an arbitrary number by a product of the prime numbers smaller than the first threshold.

9. A method of generation, by an electronic circuit, of at least one prime number by testing primality of successive candidate numbers, implementing the protection method of claim 1 .

10. An electronic circuit comprising means capable of implementing the method of claim 1 .

11. The method of claim 1 , wherein the first prime number and the second prime number are generated as at least part of an encryption algorithm.

12. A method, comprising:

generating, using a circuit, a first sieve table for a first candidate number using a plurality of prime numbers; and

generating, using the circuit, a second sieve table for at least one second candidate number using the plurality of prime numbers; wherein:

generating the first sieve table comprises applying the plurality of prime numbers in a first order and wherein generating the second sieve table comprises applying the plurality of prime numbers in a second order different than the first order;

the at least one second candidate number comprises a plurality of second candidate numbers; and

the second order of testing the primality of the plurality of second candidate numbers is modified for each candidate number of the plurality of second candidate numbers.

13. The method of claim 12 , wherein the first candidate number is a candidate number for a first prime number and wherein the at least one second candidate number is a candidate number for a second prime number.

14. The method of claim 12 , wherein the first and at least one second candidate numbers are candidate numbers for a first prime number.

15. The method of claim 12 , wherein applying the plurality of prime numbers comprises a test of divisibility by the plurality of prime numbers.

16. A system comprising:

a circuit that is configured to:

generate a first sieve table for a first candidate number using a plurality of prime numbers; and

generate a second sieve table for at least one second candidate number using the plurality of prime numbers; wherein:

generating the first sieve table comprises applying the plurality of prime numbers in a first order and wherein generating the second sieve table comprises applying the plurality of prime numbers in a second order different than the first order;

the at least one second candidate number comprises a plurality of second candidate numbers; and

the second order of testing the primality of the plurality of second candidate numbers is modified for each candidate number of the plurality of second candidate numbers.

17. The system of claim 16 , wherein the first candidate number is a candidate number for a first prime number and wherein the at least one second candidate number is a candidate number for a second prime number.

18. The system of claim 16 , wherein the first and at least one second candidate numbers are candidate numbers for a first prime number.

19. The system of claim 16 , wherein applying the plurality of prime numbers comprises a test of divisibility by the plurality of prime numbers.

20. An apparatus comprising:

a memory; and

at least one processor coupled to the memory, for:

generating a first sieve table for a first candidate number using a plurality of prime numbers; and

generating a second sieve table for at least one second candidate number using the plurality of prime numbers; wherein:

generating the first sieve table comprises applying the plurality of prime numbers in a first order and wherein generating the second sieve table comprises applying the plurality of prime numbers in a second order different than the first order;

the at least one second candidate number comprises a plurality of second candidate numbers; and

the second order of testing the primality of the plurality of second candidate numbers is modified for each candidate number of the plurality of second candidate numbers.

21. The apparatus of claim 20 , wherein the first candidate number is a candidate number for a first prime number and wherein the at least one second candidate number is a candidate number for a second prime number.

22. The apparatus of claim 20 , wherein the first and at least one second candidate numbers are candidate numbers for a first prime number.

23. The apparatus of claim 20 , wherein applying the plurality of prime numbers comprises a test of divisibility by the plurality of prime numbers.

24. At least one processor readable storage device storing processor executable instructions which, when executed by at least one processor, cause the at least one processor to perform a method comprising:

generating a first sieve table for a first candidate number using a plurality of prime numbers; and

generating a second sieve table for at least one second candidate number using the plurality of prime numbers, wherein:

generating the first sieve table comprises applying the plurality of prime numbers in a first order and wherein generating the second sieve table comprises applying the plurality of prime numbers in a second order different than the first order;

the at least one second candidate number comprises a plurality of second candidate numbers; and

the second order of testing the primality of the plurality of second candidate numbers is modified for each candidate number of the plurality of second candidate numbers.

25. The at least one processor readable storage device of claim 24 , wherein the first candidate number is a candidate number for a first prime number and wherein the at least one second candidate number is a candidate number for a second prime number.

26. The at least one processor readable storage device of claim 24 , wherein the first and at least one second candidate numbers are candidate numbers for a first prime number.

27. The at least one processor readable storage device of claim 24 , wherein applying the plurality of prime numbers comprises a test of divisibility by the plurality of prime numbers.