IP Library › Granted Patent US 8,471,620
Granted Patent B2
US 8,471,620 · App. 12/879,610 · Granted Jun 25, 2013

Semiconductor device and electronic appliance

Inventors: Jun Koyama (Kanagawa, JP); Atsushi Umezaki (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,471,620
App. No.
12/879,610
Granted
Jun 25, 2013
Kind
B2
Abstract

The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.

Claims (108)

1. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein a first terminal of the first transistor is electrically connected to a first wiring, and a second terminal of the first transistor is electrically connected to a second wiring,

wherein a first terminal of the second transistor is electrically connected to a third wiring, and a second terminal of the second transistor is electrically connected to the second wiring,

wherein a first terminal of the third transistor is electrically connected to the first wiring, a second terminal of the third transistor is electrically connected to a gate of the first transistor, and a gate of the third transistor is electrically connected to a fourth wiring,

wherein a first terminal of the fourth transistor is electrically connected to the third wiring, a second terminal of the fourth transistor is electrically connected to the gate of the first transistor, and a gate of the fourth transistor is electrically connected to a gate of the second transistor,

wherein a first terminal of the fifth transistor is electrically connected to a fifth wiring, a second terminal of the fifth transistor is electrically connected to the gate of the second transistor, and

wherein a first terminal of the sixth transistor is electrically connected to the third wiring, a second terminal of the sixth transistor is electrically connected to the gate of the second transistor, and a gate of the sixth transistor is electrically connected to the fourth wiring.

2. The semiconductor device according to claim 1 ,

wherein a first signal is input to the fourth wiring,

wherein a second signal is output from the second wiring, and

wherein an amplitude voltage of the second signal is higher than an amplitude voltage of the first signal.

3. The semiconductor device according to claim 2 ,

wherein the first signal is a digital signal,

wherein the second signal is a digital signal,

wherein the second signal is high when the first signal is high, and

wherein the second signal is low when the first signal is low.

4. The semiconductor device according to claim 1 , wherein a gate of the fifth transistor is electrically connected to a sixth wiring.

5. The semiconductor device according to claim 1 , wherein a gate of the fifth transistor is electrically connected to the first wiring.

6. The semiconductor device according to claim 1 , wherein a gate of the fifth transistor is electrically connected to the fifth wiring.

7. The semiconductor device according to claim 1 , wherein the fourth wiring is electrically connected to a shift register circuit.

8. The semiconductor device according to claim 1 , wherein the first to sixth transistors are transistors comprising an oxide semiconductor.

9. An electronic appliance comprising the semiconductor device according to claim 1 .

10. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein a first terminal of the first transistor is electrically connected to a first wiring, and a second terminal of the first transistor is electrically connected to a second wiring,

wherein a first terminal of the second transistor is electrically connected to a third wiring, and a second terminal of the second transistor is electrically connected to the second wiring,

wherein a second terminal of the third transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fourth transistor is electrically connected to the third wiring, a second terminal of the fourth transistor is electrically connected to the gate of the first transistor, and a gate of the fourth transistor is electrically connected to a gate of the second transistor,

wherein a first terminal of the fifth transistor is electrically connected to a fifth wiring, a second terminal of the fifth transistor is electrically connected to the gate of the second transistor, and a gate of the fifth transistor is electrically connected to a sixth wiring, and

wherein a first terminal of the sixth transistor is electrically connected to the third wiring, a second terminal of the sixth transistor is electrically connected to the gate of the second transistor, and a gate of the sixth transistor is electrically connected to a fourth wiring.

11. The semiconductor device according to claim 10 ,

wherein a first signal is input to the fourth wiring,

wherein a second signal is output from the second wiring, and

wherein an amplitude voltage of the second signal is higher than an amplitude voltage of the first signal.

12. The semiconductor device according to claim 11 ,

wherein the first signal is a digital signal,

wherein the second signal is a digital signal,

wherein the second signal is high when the first signal is high, and

wherein the second signal is low when the first signal is low.

13. The semiconductor device according to claim 10 ,

wherein a first terminal of the third transistor is electrically connected to a seventh wiring and a gate of the third transistor is electrically connected to the fourth wiring,

wherein a third signal is input to the seventh wiring, and

wherein the third signal is an inverted signal of a first signal, the first signal is input to the fourth wiring.

14. The semiconductor device according to claim 10 , wherein a first terminal of the third transistor is electrically connected to a gate of the third transistor and the gate of the third transistor is electrically connected to the fourth wiring.

15. The semiconductor device according to claim 10 , wherein a first terminal of the third transistor is electrically connected to the fourth wiring and a gate of the third transistor is electrically connected to the fifth wiring.

16. The semiconductor device according to claim 10 , wherein the fourth wiring is electrically connected to a shift register circuit.

17. The semiconductor device according to claim 10 , wherein the first to sixth transistors are transistors comprising an oxide semiconductor.

18. An electronic appliance comprising the semiconductor device according to claim 10 .

19. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein a first terminal of the first transistor is electrically connected to a first wiring, and a second terminal of the first transistor is electrically connected to a second wiring,

wherein a first terminal of the second transistor is electrically connected to a third wiring, and a second terminal of the second transistor is electrically connected to the second wiring,

wherein a first terminal of the third transistor is electrically connected to a fourth wiring and a second terminal of the third transistor is electrically connected to a gate of the first transistor,

wherein a first terminal of the fourth transistor is electrically connected to the third wiring, a second terminal of the fourth transistor is electrically connected to the gate of the first transistor, and a gate of the fourth transistor is electrically connected to a gate of the second transistor,

wherein a first terminal of the fifth transistor is electrically connected to a fifth wiring, a second terminal of the fifth transistor is electrically connected to the gate of the second transistor, and a gate of the fifth transistor is electrically connected to a sixth wiring, and

wherein a first terminal of the sixth transistor is electrically connected to the third wiring, a second terminal of the sixth transistor is electrically connected to the gate of the second transistor, and a gate of the sixth transistor is electrically connected to the fourth wiring.

20. The semiconductor device according to claim 19 ,

wherein a first signal is input to the fourth wiring,

wherein a second signal is output from the second wiring, and

wherein an amplitude voltage of the second signal is higher than an amplitude voltage of the first signal.

21. The semiconductor device according to claim 20 ,

wherein the first signal is a digital signal,

wherein the second signal is a digital signal,

wherein the second signal is high when the first signal is high, and

wherein the second signal is low when the first signal is low.

22. The semiconductor device according to claim 19 , wherein the fourth wiring is electrically connected to a shift register circuit.

23. The semiconductor device according to claim 19 , wherein the first to sixth transistors are transistors comprising an oxide semiconductor.

24. An electronic appliance comprising the semiconductor device according to claim 19 .

25. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein a first terminal of the first transistor is electrically connected to a first wiring, and a second terminal of the first transistor is electrically connected to a second wiring,

wherein a first terminal of the second transistor is electrically connected to a third wiring, and a second terminal of the second transistor is electrically connected to the second wiring,

wherein a second terminal of the third transistor is electrically connected to a gate of the first transistor and a gate of the third transistor is electrically connected to a fourth wiring,

wherein a first terminal of the fourth transistor is electrically connected to the third wiring, a second terminal of the fourth transistor is electrically connected to the gate of the first transistor, and a gate of the fourth transistor is electrically connected to a gate of the second transistor,

wherein a first terminal of the fifth transistor is electrically connected to a fifth wiring, a second terminal of the fifth transistor is electrically connected to the gate of the second transistor,

wherein a first terminal of the sixth transistor is electrically connected to the third wiring, a second terminal of the sixth transistor is electrically connected to the gate of the second transistor, and a gate of the sixth transistor is electrically connected to the fourth wiring, and

wherein a first signal is input to the fourth wiring,

wherein a second signal is output from the second wiring, and

wherein an amplitude voltage of the second signal is higher than an amplitude voltage of the first signal.

26. The semiconductor device according to claim 25 ,

wherein the first signal is a digital signal,

wherein the second signal is a digital signal,

wherein the second signal is high when the first signal is high, and

wherein the second signal is low when the first signal is low.

27. The semiconductor device according to claim 25 , wherein the fourth wiring is electrically connected to a shift register circuit.

28. The semiconductor device according to claim 25 , wherein the first to sixth transistors are transistors comprising an oxide semiconductor.

29. An electronic appliance comprising the semiconductor device according to claim 25 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2010
From: KOYAMA, JUN; UMEZAKI, ATSUSHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 024984/0564 →
Priority Claims (1)
JP 2009-214848 · Sep 16, 2009 · national
Continuity (1)
Related Publication 20110063014A1 · Mar 17, 2011