Method and apparatus for implementation of PLL minimum frequency via voltage comparison
View Patent ↗A method and apparatus for implementation of PLL minimum frequency via voltage comparison have been described.
1. A method comprising
determining if a PLL output frequency is less than a predetermined minimum; and
when less than said predetermined minimum selecting a predetermined control voltage;
when not less than said predetermined minimum selecting a control voltage from a charge pump in said PLL; and
wherein said determining is based on a comparison of said control voltage from said charge pump in said PLL with a reference voltage.
2. An apparatus comprising:
a charge pump having an output;
a selector having a first input, a second input, a select input, and an output, wherein said charge pump output is coupled to said selector first input;
a comparator having a first input, a second input, and an output, wherein said first input is coupled to said charge pump output, and said comparator output is coupled to said selector select input;
a first reference voltage, said first reference voltage coupled to said comparator second input;
a second reference voltage, said second reference voltage coupled to said selector second input; and
a bias generator having a input, said input coupled to said selector output.
3. The apparatus of claim 2 wherein said selector further comprises two or more transmission gates wherein each of said two or more transmission gates has an input, an output, and a control input.
4. The apparatus of claim 3 wherein at least one of said two or more transmission gates has its input coupled to said charge pump output and its output coupled to said bias generator input.
5. The apparatus of claim 4 wherein at least one of said two or more transmission gates has its input coupled to said second reference voltage and its output coupled to said bias generator input.