SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
It is an object to provide a semiconductor device with less power consumption as a semiconductor device including a thin film transistor using an oxide semiconductor layer. It is an object to provide a semiconductor device with high reliability as a semiconductor device including a thin film transistor using an oxide semiconductor layer. In the semiconductor device, a gate electrode layer (a gate wiring layer) intersects with a wiring layer which is electrically connected to a source electrode layer or a drain electrode layer with an insulating layer which covers the oxide semiconductor layer of the thin film transistor and a gate insulating layer interposed therebetween. Accordingly, the parasitic capacitance formed by a stacked-layer structure of the gate electrode layer, the gate insulating layer, and the source or drain electrode layer can be reduced, so that low power consumption of the semiconductor device can be realized.
1 . A semiconductor device comprising:
a gate wiring layer;
a gate electrode layer connected to the gate wiring layer;
a gate insulating layer over the gate electrode layer;
an oxide semiconductor layer over the gate insulating layer;
a source and drain electrode layers over the oxide semiconductor layer;
an oxide insulating layer over the source and drain electrode layers, wherein the oxide insulating layer is in contact with the oxide semiconductor layer; and
a wiring layer over the oxide insulating layer, wherein the wiring layer is electrically connected to one of the source and drain electrode layers through an opening of the oxide insulating layer,
wherein the wiring layer and the gate wiring layer partly overlap each other with the gate insulating layer and the oxide insulating layer interposed therebetween.
2 . The semiconductor device according to claim 1 , wherein a resistance of the wiring layer is lower than a resistance of each of the source and drain electrode layers.
3 . The semiconductor device according to claim 1 , wherein each of the source and drain electrode layers is thinner than the wiring layer.
4 . The semiconductor device according to claim 1 , wherein the wiring layer includes aluminum or copper.
5 . The semiconductor device according to claim 1 , wherein the source and drain electrode layers include a titanium film.
6 . The semiconductor device according to claim 1 , wherein the oxide insulating layer is a silicon oxide film or an aluminum oxide film.
7 . A semiconductor device comprising:
a gate wiring layer;
a gate electrode layer connected to the gate wiring layer;
a gate insulating layer over the gate electrode layer;
an oxide semiconductor layer over the gate insulating layer;
a source and drain electrode layers over the oxide semiconductor layer;
an oxide insulating layer over the source and drain electrode layers, wherein the oxide insulating layer is in contact with the oxide semiconductor layer; and
a wiring layer over the oxide insulating layer, wherein the wiring layer is electrically connected to one of the source and drain electrode layers through an opening of the oxide insulating layer,
wherein the wiring layer and the gate wiring layer partly overlap each other with the gate insulating layer and the oxide insulating layer interposed therebetween, and
wherein the wiring layer has a stacked-layer structure of a first wiring layer and a second wiring layer, and the first wiring layer is in contact with one of the source and drain electrode layers.
8 . The semiconductor device according to claim 7 , wherein a resistance of the first wiring layer is lower than a resistance of each of the source and drain electrode layers.
9 . The semiconductor device according to claim 7 , wherein each of the source and drain electrode layers is thinner than the first wiring layer and the second wiring layer.
10 . The semiconductor device according to claim 7 , wherein the first wiring layer is an aluminum film and the second wiring layer is a titanium film.
11 . The semiconductor device according to claim 7 , wherein the source and drain electrode layers include a titanium film.
12 . The semiconductor device according to claim 7 , wherein the oxide insulating layer is a silicon oxide film or an aluminum oxide film.
13 . A semiconductor device comprising:
a gate wiring layer;
a gate electrode layer connected to the gate wiring layer;
a gate insulating layer over the gate electrode layer;
a semiconductor layer over the gate insulating layer;
a source and drain electrode layers over the semiconductor layer;
an oxide insulating layer over the source and drain electrode layers, wherein the oxide insulating layer is in contact with the semiconductor layer; and
a wiring layer over the oxide insulating layer, wherein the wiring layer extends across the gate wiring layer and is electrically connected to one of the source and drain electrode layers through an opening of the oxide insulating layer,
wherein the wiring layer and the gate wiring layer overlap each other at a portion where the wiring layer extends across the gate wiring layer with the gate insulating layer and the oxide insulating layer interposed therebetween.
14 . The semiconductor device according to claim 13 , wherein a resistance of the wiring layer is lower than a resistance of each of the source and drain electrode layers.
15 . The semiconductor device according to claim 13 , wherein each of the source and drain electrode layers is thinner than the wiring layer.
16 . The semiconductor device according to claim 13 , wherein the wiring layer includes aluminum or copper.
17 . The semiconductor device according to claim 13 , wherein the source and drain electrode layers include a titanium film.
18 . The semiconductor device according to claim 13 , wherein the oxide insulating layer is a silicon oxide film or an aluminum oxide film.
19 . A semiconductor device comprising:
a gate wiring layer;
a gate electrode layer connected to the gate wiring layer;
a gate insulating layer over the gate electrode layer;
a semiconductor layer over the gate insulating layer;
a source and drain electrode layers over the semiconductor layer;
an oxide insulating layer over the source and drain electrode layers, wherein the oxide insulating layer is in contact with the semiconductor layer; and
a wiring layer over the oxide insulating layer, wherein the wiring layer extends across the gate wiring layer and is electrically connected to one of the source and drain electrode layers through an opening of the oxide insulating layer,
wherein the wiring layer and the gate wiring layer overlap each other at a portion where the wiring layer extends across the gate wiring layer with the gate insulating layer and the oxide insulating layer interposed therebetween, and
wherein the wiring layer has a stacked-layer structure of a first wiring layer and a second wiring layer, and the first wiring layer is in contact with one of the source and drain electrode layers.
20 . The semiconductor device according to claim 19 , wherein a resistance of the first wiring layer is lower than a resistance of each of the source and drain electrode layers.
21 . The semiconductor device according to claim 19 , wherein each of the source and drain electrode layers is thinner than the first wiring layer and the second wiring layer.
22 . The semiconductor device according to claim 19 , wherein the first wiring layer is an aluminum film and the second wiring layer is a titanium film.
23 . The semiconductor device according to claim 19 , wherein the source and drain electrode layers include a titanium film.
24 . The semiconductor device according to claim 19 , wherein the oxide insulating layer is a silicon oxide film or an aluminum oxide film.
25 . A method for manufacturing a semiconductor device, comprising:
forming a gate wiring layer;
forming a gate electrode layer connected to the gate wiring layer;
forming a gate insulating layer over the gate electrode layer;
forming an oxide semiconductor layer over the gate insulating layer;
subjecting the oxide semiconductor layer to dehydration or dehydrogenation and preventing from being exposed to air so that entry of water or hydrogen is prevented;
forming a source and drain electrode layers over the oxide semiconductor layer;
forming an oxide insulating layer which is in contact with part of the oxide semiconductor layer, over the oxide semiconductor layer and the source and drain electrode layers; and
forming a wiring layer over the oxide insulating layer, wherein the wiring layer is electrically connected to one of the source and drain electrode layers through an opening of the oxide insulating layer,
wherein the wiring layer and the gate wiring layer partly overlap each other with the gate insulating layer and the oxide insulating layer interposed therebetween,
wherein the wiring layer has lower resistance than each of the source and drain electrode layers, and
wherein each of the source and drain electrode layers is thinner than the wiring layer.
26 . The method for manufacturing a semiconductor device according to claim 25 wherein the source and drain electrode layers are formed using titanium.
27 . The method for manufacturing a semiconductor device according to claim 25 , wherein the wiring layer is formed using aluminum or copper.
28 . The method for manufacturing a semiconductor device according to claim 25 , wherein the oxide insulating layer is formed by using a silicon oxide film or an aluminum oxide film formed by a sputtering method.