Wafer tray and test apparatus
View Patent ↗In order to shorten testing time of a plurality of devices under test formed on a semiconductor wafer, a wafer tray used by a test apparatus performing the test is provided. The wafer tray includes a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded. By using this wafer tray, the semiconductor wafer, which is the object being tested, can be smoothly attached to and detached from different test heads, and testing can be begun quickly after the semiconductor wafer is attached to a test head.
1. A test apparatus for testing a plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded, the test apparatus comprising:
a first exhaust apparatus connected to the first flow passage;
a second exhaust apparatus connected to the second flow passage; and
a control section for controlling drive of the first exhaust apparatus and drive of the second exhaust apparatus such that a vacuum degree of the first flow passage is greater than a vacuum degree of the second flow passage.
2. The test apparatus according to claim 1 , wherein
the wafer tray further comprises a third flow passage that circulates a thermal medium or a cooling medium for cooling at least the loading surface.
3. The test apparatus according to claim 1 further comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card.
4. The test apparatus according to claim 3 , wherein
the probe card is formed of at least a circuit board, which is a hard substrate, and a membrane unit having an elastic sheet on which the electrical contact points are arranged, and
the sealed space is formed between the wafer tray and the circuit board via a through-hole provided in the membrane unit.
5. The test apparatus according to claim 3 , wherein
the probe card can be attached to and detached from the test apparatus, and
the probe card, the wafer, and the wafer tray can move integrally while maintaining, the vacuum suction of the sealed space.
6. The test apparatus according to claim 3 , wherein
when the semiconductor wafer is not loaded on the wafer tray, the wafer tray has a dummy wafer loaded thereon and is fixed to the test apparatus.
7. A test apparatus for testing a plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded, the test apparatus comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card,
the probe card is formed of at least a circuit board, which is a hard substrate, and a membrane unit having an elastic sheet on which the electrical contact points are arranged, and
the sealed space is formed between the wafer tray and the circuit board via a through-hole provided in the membrane unit.
8. The test apparatus according to claim 7 , wherein
the probe card can be attached to and detached from the test apparatus, and
the probe card, the wafer, and the wafer tray can move integrally while maintaining the vacuum suction of the sealed space.
9. The test apparatus according to claim 7 , wherein
when the semiconductor wafer is not loaded on the wafer tray, the wafer tray has a dummy wafer loaded thereon and is fixed to the test apparatus.
10. A test apparatus for testing as plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage, for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded, wherein the first flow passage and the second flow passage are connected to each other in the wafer tray, the test apparatus comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card,
the probe card can be attached to and detached from the test apparatus, and
the probe card, the wafer, and the wafer tray can move integrally while maintaining, the vacuum suction of the sealed space.
11. A test apparatus for testing a plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded wherein the first flow passage and the second flow passage are connected to each other in the wafer tray, the test apparatus comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card,
the probe card is formed of at least a circuit board, which is a hard substrate, and a membrane unit having an elastic sheet on which the electrical contact points are arranged, and
the sealed space is formed between the wafer ray and the circuit board via a through-hole provided in the membrane unit.
12. A test apparatus for testing a plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, a heater for heating a loading surface on which at least the semiconductor wafer is loaded, and a third flow passage that circulates a thermal medium or a cooling medium for cooling at least the loading surface, wherein the first flow passage and the second flow passage are connected to each other in the wafer tray, the test apparatus comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card,
the probe card is formed of at least a circuit board, which is a hard substrate, and a membrane unit having an elastic sheet on which the electrical contact points are arranged, and
the sealed space is formed between the wafer tray and the circuit board via a through-hole provided in the membrane unit.
13. A test apparatus for testing a plurality of devices under test formed on a semiconductor wafer using a wafer tray including a first flow passage for fixing, the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, a heater for heating a loading surface on which at least the semiconductor wafer is loaded, and a third flow passage that circulates a thermal medium or a cooling medium for cooling at least the loading surface, wherein the first flow passage and the second flow passage are connected to each other in the wafer tray, the test apparatus comprising:
a probe card having a contact surface that is layered on the semiconductor wafer and on which is arranged electrical contact points, the electrical contact points connected respectively to electrical contact points of the devices under test, wherein
the wafer tray is fixed to the test apparatus by vacuum suction achieved using a sealed space formed between the wafer tray and the probe card,
the probe card can be attached to and detached from the test apparatus, and
the probe card, the wafer, and the wafer tray can move integrally while maintaining, the vacuum suction of the sealed space.