Send-side matching of data communications messages

1. Apparatus for send-side matching of data communications messages in a distributed computing system comprising a plurality of compute nodes organized for collective operations, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions capable, when executed by the computer processor, of causing the apparatus to carry out the steps of:

issuing, by a receiving node to a plurality of source nodes, a receive message that specifies receipt of a single message to be sent from any source node, the receive message also including message matching information, a specification of a hardware-level mutual exclusion device, and an identification of a receive buffer;

matching by two or more of the source nodes the receive message with pending send messages in the two or more source nodes by comparing the tags of each pending send messages with the message matching information in the receive message;

operating by one of the source nodes having a matching send message the hardware-level mutual exclusion device, excluding messages from other source nodes with matching send messages and identifying to the receiving node the source node operating the hardware-level mutual exclusion device;

in response to identifying to the receiving node the source node operating the hardware-level mutual exclusion device, issuing, by the receiving node, a cancellation message to the other source nodes that cancels the matching send messages; and

sending to the receiving node from the source node operating the hardware-level mutual exclusion device a matched pending send message.

2. The apparatus of claim 1 wherein issuing a receive message further comprises initializing the hardware-level mutual exclusion device to an unlocked state.

3. The apparatus of claim 1 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Read-Modify-Write (‘RMW’) mechanism on the receiving node to atomically obtain a lock on a first predefined memory location and write an identifier of the source node into a second predefined memory location on the receiving node.

4. The apparatus of claim 1 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Test-And-Set (‘T&S’) mechanism on the receiving node to atomically obtain a lock on a predefined memory location and write an identifier of the source node into the predefined memory location on the receiving node.

5. The apparatus of claim 1 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Fetch-And-Increment (‘F&I’) mechanism on the receiving node to atomically obtain a lock on a predefined memory location and write an identifier of the source node into the predefined memory location on the receiving node.

6. A computer program product for send-side matching of communications messages in a distributed computing system comprising a plurality of compute nodes organized for collective operations, the computer program product disposed upon a non-transitory computer readable storage medium, the computer program product comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of:

issuing, by a receiving node to a plurality of source nodes, a receive message that specifies receipt of a single message to be sent from any source node, the receive message also including message matching information, a specification of a hardware-level mutual exclusion device, and an identification of a receive buffer;

matching by two or more of the source nodes the receive message with pending send messages in the two or more source nodes by comparing the tags of each pending send messages with the message matching information in the receive message;

operating by one of the source nodes having a matching send message the hardware-level mutual exclusion device, excluding messages from other source nodes with matching send messages and identifying to the receiving node the source node operating the hardware-level mutual exclusion device;

in response to identifying to the receiving node the source node operating the hardware-level mutual exclusion device, issuing, by the receiving node, a cancellation message to the other source nodes that cancels the matching send messages; and

sending to the receiving node from the source node operating the hardware-level mutual exclusion device a matched pending send message.

7. The computer program product of claim 6 wherein issuing a receive message further comprises initializing the hardware-level mutual exclusion device to an unlocked state.

8. The computer program product of claim 6 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Read-Modify-Write (‘RMW’) mechanism on the receiving node to atomically obtain a lock on a first predefined memory location and write an identifier of the source node into a second predefined memory location on the receiving node.

9. The computer program product of claim 6 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Test-And-Set (‘T&S’) mechanism on the receiving node to atomically obtain a lock on a predefined memory location and write an identifier of the source node into the predefined memory location on the receiving node.

10. The computer program product of claim 6 wherein operating the hardware-level mutual exclusion device further comprises operating through data communications network hardware a hardware Fetch-And-Increment (‘F&I’) mechanism on the receiving node to atomically obtain a lock on a predefined memory location and write an identifier of the source node into the predefined memory location on the receiving node.