Oscillator having time-variant frequency deviation and related power supply
An oscillator with time-variant frequency deviation for a power supply includes a signal generator for generating a first signal according to a clock signal and a comparing unit for adding an offset to at least one of the first signal and a threshold voltage corresponding to the first signal and for comparing the first signal and the threshold voltage after completion of the offset adding, to generate the clock signal whose frequency deviates with variation of the added offset.
1. An oscillator with time-variant frequency deviation for a power supply, the oscillator comprising:
a signal generator for generating a ramp signal according to a clock signal; and
a comparing unit coupled to the signal generator, comprising:
a first input end coupled to a first offset cyclic adjusting unit for receiving one of an upper threshold voltage and a lower threshold voltage to add a plurality of offsets to the upper or lower threshold voltages to generate an offset threshold voltage;
a second input end coupled to the signal generator for receiving the ramp signal; and
a comparator coupled to the offset threshold voltage for comparing the ramp signal with the offset threshold voltage, to generate a jitter clock signal whose frequency deviates with variation of the added offset.
2. The oscillator of claim 1 , wherein the signal generator comprises:
a first current source for providing a charge circuit;
a second current source for providing a discharge circuit;
a charge switch coupled to the first current source for being controlled by the clock signal;
a discharge switch coupled to the second current source for being controlled by the inverse signal of the clock signal; and
a capacitor for being charged by the charge circuit via the charge switch and for being discharged by the discharge circuit via the discharge switch, to generate the ramp signal.
3. The oscillator of claim 1 , wherein the threshold voltage corresponds to an upper threshold voltage or a lower threshold voltage of the ramp signal.
4. The oscillator of claim 1 , wherein the comparing unit further comprises:
a second offset cyclic adjusting unit coupled to the second input end and the comparator for providing the offset in a saw-tooth waveform and adding the offset on the ramp signal to generate an offset ramp signal, such that the comparator compares the offset ramp signal with the threshold voltage to generate the jitter clock signal.
5. The oscillator of claim 4 , wherein the second offset cyclic adjusting unit comprises:
a plurality of branches, each branch including a switch and a transistor, the gate of each transistor coupled with each other, for receiving the ramp signal, wherein the plurality of switches conducts or cuts off the plurality of branches to generate the offset ramp signal.
6. The oscillator of claim 4 , wherein the second offset cyclic adjusting unit is a transistor having a gate for receiving a saw-tooth wave signal used as the offset.
7. The oscillator of claim 1 , wherein the first offset cyclic adjusting unit coupled to the first input end and the comparator for providing the offset in a saw-tooth wave form and adding the offset on the threshold voltage to generate an offset threshold voltage such that the comparator compares the ramp signal with the offset threshold voltage to generate the jitter clock signal.
8. The oscillator of claim 7 , wherein the first offset cyclic adjusting unit comprises:
a plurality of branches, each branch including a switch and a transistor, the gate of each transistor coupled with each other, for receiving the threshold voltage, wherein the plurality of switches conducts or cuts off the plurality of branches to generate the offset threshold voltage signal.
9. The oscillator of claim 7 , wherein the first offset cyclic adjusting unit is a transistor having a gate for receiving a saw-tooth wave signal used as the offset.
10. A power supply with time-variant frequency deviation, the power supply comprising:
a pulse width modulation (PWM) controller for generating a switch signal for adjusting a load current of the power supply according to a clock signal and a feedback signal, wherein the feedback signal includes the variation information of the load current; and
an oscillator coupled to the PWM controller, comprising:
a first input end coupled to a first offset cyclic adjusting unit for receiving one of an upper threshold voltage and a lower threshold voltage to add a plurality of offsets to the upper or lower threshold voltages to generate an offset threshold voltage;
a second input end coupled to the signal generator for receiving the ramp signal; and
a comparator coupled to the offset threshold voltage for comparing the ramp signal with the offset threshold voltage to generate a jitter clock signal whose frequency deviates with variation of the offset.
11. The power supply of claim 10 , wherein the signal generator comprises:
a first current source for providing a charge circuit;
a second current source for providing a discharge circuit;
a charge switch coupled to the first current source for being controlled by the clock signal;
a discharge switch coupled to the second current source for being controlled by the inverse signal of the clock signal; and
a capacitor for being charged by the charge circuit via the charge switch and for being discharged by the discharge circuit via the discharge switch, to generate the ramp signal.
12. The power supply of claim 10 , wherein the threshold voltage corresponds to an upper threshold voltage or a lower threshold voltage of the ramp signal.
13. The power supply of claim 10 , wherein the comparing unit further comprises:
a second offset cyclic adjusting unit coupled to the second input end and the comparator for providing the offset in a saw-tooth waveform and adding the offset on the ramp signal to generate an offset ramp signal, such that the comparator compares the offset ramp signal with the threshold voltage to generate the jitter clock signal.
14. The power supply of claim 13 , wherein the second offset cyclic adjusting unit comprises:
a plurality of branches, each branch including a switch and a transistor, the gate of each transistor coupled with each other, for receiving the ramp signal, wherein the plurality of switches conducts or cuts off the plurality of branches to generate the offset ramp signal.
15. The power supply of claim 13 , wherein the second offset cyclic adjusting unit is a transistor having a gate for receiving a saw-tooth wave signal used as the offset.
16. The power supply of claim 10 , wherein the first offset cyclic adjusting unit coupled to the first input end and the comparator for providing the offset in a saw-tooth wave form and adding the offset on the threshold voltage to generate an offset threshold voltage such that the comparator compares the ramp signal with the offset threshold voltage to generate the jitter clock signal.
17. The power supply of claim 16 , wherein the first offset cyclic adjusting unit comprises:
a plurality of branches, each branch including a switch and a transistor, the gate of each transistor coupled with each other, for receiving the threshold voltage, wherein the plurality of switches conducts or cuts off the plurality of branches to generate the offset threshold voltage signal.
18. The power supply of claim 16 , wherein the first offset cyclic adjusting unit is a transistor having a gate for receiving a saw-tooth wave signal used as the offset.