IP Library Granted Patent US 8,072,832
Granted Patent B2
US 8,072,832 · App. 12/888,158 · Granted Dec 6, 2011

Electronic equipment system and semiconductor integrated circuit controller

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Quick Facts
Patent No.
US 8,072,832
App. No.
12/888,158
Granted
Dec 6, 2011
Kind
B2
Abstract

An electronic equipment system includes a semiconductor integrated circuit having a nonvolatile memory storing information on a characteristic of the semiconductor integrated circuit; and a controller configured to control the semiconductor integrated circuit. The controller has a function of adjusting an access parameter to the semiconductor integrated circuit based on the information stored in the nonvolatile memory.

Claims (26)

1. An electronic equipment system, comprising:

a semiconductor integrated circuit having a nonvolatile memory storing information on a characteristic of the semiconductor integrated circuit; and

a controller configured to control the semiconductor integrated circuit,

wherein the controller has a function of adjusting an access parameter to the semiconductor integrated circuit based on the information stored in the nonvolatile memory;

the function of the controller of adjusting an access parameter to the semiconductor integrated circuit is a function of adjusting an electric characteristic of a signal or a voltage supplied to the semiconductor integrated circuit or another semiconductor integrated circuit operating in coordination with the semiconductor integrated circuit based on the information stored in the nonvolatile memory; and

the signal supplied to the semiconductor integrated circuit or the another semiconductor integrated circuit is a clock signal or a timing control signal, and the electric characteristic is at least one of the edge timing, duty ratio, phase, and frequency of the clock signal or the edge timing of the timing control signal.

2. The electronic equipment system of claim 1 , wherein the clock signal is a clock signal supplied to the semiconductor integrated circuit for controlling transmission or reception of data in the semiconductor integrated circuit.

3. The electronic equipment system of claim 1 , wherein the clock signal is a clock signal supplied to the another semiconductor integrated circuit for controlling transmission or reception of data to or from the semiconductor integrated circuit.

4. The electronic equipment system of claim 1 , wherein the voltage supplied to the semiconductor integrated circuit is at least one of a power supply voltage, a bias voltage, and a reference voltage, and the electric characteristic is a voltage value of the power supply voltage, the bias voltage, or the reference voltage.

5. An electronic equipment system, comprising:

a semiconductor integrated circuit having a nonvolatile memory storing information on a characteristic of the semiconductor integrated circuit; and

a controller configured to control the semiconductor integrated circuit,

wherein the controller has a function of adjusting an access parameter to the semiconductor integrated circuit based on the information stored in the nonvolatile memory;

the function of the controller of adjusting an access parameter to the semiconductor integrated circuit is a function of adjusting an electric characteristic of a signal or a voltage supplied to the semiconductor integrated circuit or another semiconductor integrated circuit operating in coordination with the semiconductor integrated circuit based on the information stored in the nonvolatile memory; and

the electric characteristic is a voltage value of a power supply voltage with which the delay time in a predetermined signal path in operation of the semiconductor integrated circuit is equal to or less than a predetermined value.

6. The electronic equipment system of claim 1 , wherein the semiconductor integrated circuit is a system LSI including a plurality of logic circuit modules.

7. The electronic equipment system of claim 1 , wherein the semiconductor integrated circuit is a memory.

8. The electronic equipment system of claim 7 , wherein the semiconductor integrated circuit is a double data rate synchronous dynamic random access memory.

9. The electronic equipment system of claim 1 , wherein the nonvolatile memory is constructed of at least one of a fuse and an antifuse.

10. The electronic equipment system of claim 1 , wherein the semiconductor integrated circuit is constructed so that a circuit characteristic is adjusted based on the information stored in the nonvolatile memory.

11. The electronic equipment system of claim 1 , wherein the information stored in the nonvolatile memory is information indicating at least one of the optimum value, upper-limit value, lower-limit value, and upper/lower-limit values of the access parameter.

12. The electronic equipment system of claim 1 , wherein the information stored in the nonvolatile memory is information detected by a test of the semiconductor integrated circuit.

13. The electronic equipment system of claim 12 , wherein the test of the semiconductor integrated circuit is performed in a packaged state of the semiconductor integrated circuit.

14. The electronic equipment system of claim 12 , wherein the test of the semiconductor integrated circuit is performed in a mounted state of the semiconductor integrated circuit on a predetermined wiring board.

15. The electronic equipment system of claim 12 , wherein the test of the semiconductor integrated circuit is performed at a temperature higher than the maximum use temperature defined as a specification condition of the semiconductor integrated circuit.

16. The electronic equipment system of claim 1 , wherein the access parameter is related to output impedance of a driver circuit provided in the semiconductor integrated circuit.

Assignments (5)
CHANGE OF NAME Recorded Nov 3, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 058793/0748 →
RELEASE OF SECURITY INTEREST Recorded Nov 11, 2020
From: CPPIB CREDIT INVESTMENTS INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 054384/0581 →
AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2016
From: PANASONIC CORPORATION
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 040393/0332 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2010
From: AGATA, YASUHIRO; TERADA, YUTAKA; MISUMI, KENJI; SHIRAHAMA, MASANORI
To: PANASONIC CORPORATION
Reel/Frame 025508/0276 →