IP Library › Granted Patent US 8,264,874
Granted Patent B2
US 8,264,874 · App. 12/890,856 · Granted Sep 11, 2012

Semiconductor device

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,264,874
App. No.
12/890,856
Granted
Sep 11, 2012
Kind
B2
Abstract

Objects of the present invention are to improve the manufacturing yield of semiconductor devices, reduce manufacturing cost of the semiconductor device, and reduce the circuit area of an integrated circuit included in the semiconductor device. A memory layer of a memory element and a resistive layer of a resistor included in the semiconductor device are formed of the same material. Therefore, the memory layer and the resistive layer are formed in the same step, whereby the number of manufacturing steps of the semiconductor device can be reduced. As a result, the manufacturing yield of the semiconductor devices can be improved and the manufacturing cost can be reduced. In addition, the semiconductor device includes a resistor having a resistive component which has high resistance value. Consequently, the area of the integrated circuit included in the semiconductor device can be reduced.

Claims (16)

1. A semiconductor device comprising:

a memory element including a first conductive layer, a memory layer over the first conductive layer, and a second conductive layer over the memory layer; and

a resistor including a third conductive layer, a resistive layer over the third conductive layer, which is formed of the same material as the memory layer, and a fourth conductive layer over the resistive layer,

wherein the memory element is electrically connected to the resistor; and

wherein the maximum value of a voltage applied to the memory element is higher than the maximum value of a voltage applied to the resistor.

2. The semiconductor device according to claim 1 , wherein the first conductive layer and the third conductive layer, or the second conductive layer and the fourth conductive layer are formed of the same material.

3. The semiconductor device according to claim 1 , wherein the first conductive layer and the third conductive layer are formed of the same material, and the second conductive layer and the fourth conductive layer are formed of the same materials.

4. A semiconductor device comprising:

a memory element including a first conductive layer, a memory layer over the first conductive layer, and a second conductive layer over the memory layer; and

a resistor including a third conductive layer, a resistive layer over the third conductive layer, which is formed of the same material as the memory layer, and a fourth conductive layer over the resistive layer,

wherein the memory element is electrically connected to the resistor,

wherein the third conductive layer is a silicon electrode layer,

wherein the resistive layer is a stacked layer of an amorphous silicon layer over the silicon electrode layer and an insulating layer over the amorphous silicon layer, and

wherein a contact area between the first conductive layer and the memory layer is larger than a contact area between the third conductive layer and the resistive layer.

5. The semiconductor device according to claim 4 , wherein the maximum value of a voltage applied to the memory element is higher than the maximum value of a voltage applied to the resistor.

6. The semiconductor device according to claim 4 , wherein the second conductive layer and the fourth conductive layer are formed of the same material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2010
From: SAITO, TOSHIHIKO; MATSUZAKI, TAKANORI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 025044/0726 →
Priority Claims (1)
JP 2009-229869 · Oct 1, 2009 · national
Continuity (1)
Related Publication 20110080774A1 · Apr 7, 2011