IP Library › Patent Application 12891322
Patent Application
App. No. 12/891,322

SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME

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Quick Facts
Patent No.
US None
App. No.
12/891,322
Abstract

In a semiconductor device having element isolation made of a trench-type isolating oxide film 13 , large and small dummy patterns 11 of two types, being an active region of a dummy, are located in an isolating region 10 , the large dummy patterns 11 b are arranged at a position apart from actual patterns 9 , and the small dummy patterns 11 a are regularly arranged in a gap at around a periphery of the actual patterns 9 , whereby uniformity of an abrading rate is improved at a time of abrading an isolating oxide film 13 a is improved, and surface flatness of the semiconductor device becomes preferable.

Claims (112)

1 - 12 . (canceled)

13 . A method for fabricating a semiconductor device, comprising the steps of:

providing a semiconductor substrate;

forming a first active device region on a principal surface of the semiconductor substrate;

forming an isolating region around the first active device region;

forming a plurality of first active dummy patterns which are surrounded by the isolating region and are arranged in a first direction and a second direction different from the first direction, the plurality of first active dummy patterns having a first pitch;

forming a plurality of second active dummy patterns which are surrounded by the isolating region and are arranged in a third direction and a fourth direction different from the third direction, the plurality of second active dummy patterns having a second pitch; and

forming a plurality of third active dummy patterns surrounded by the isolating region, wherein

the first pitch is smaller than the second pitch,

any one of plane areas of the first active dummy patterns is smaller than any one of plane areas of the second active dummy patterns, and

any one of plane areas of the third active dummy patterns is smaller than any one of the plane areas of the first active dummy patterns.

14 . The method according to claim 13 , wherein

the isolating region comprises an oxide film in a trench in the principle surface of the semiconductor substrate,

any two of the plurality of first active dummy patterns have the same plane shape and the same plane area as each other, and

any two of the plurality of second active dummy patterns have the same plane shape and the same plane area as each other.

15 . The method according to claim 14 , wherein

the first, second and third active dummy patterns are each surrounded by the oxide film, and

the second active dummy patterns are arranged in a region more distant from the first active device region than the first active dummy patterns.

16 . The method according to claim 13 , wherein

the first direction is the same as the third direction,

the second direction is the same as the fourth direction, and

a shape of each first active dummy pattern is analogous to the shape of each second active dummy pattern.

17 . A method for fabricating a semiconductor device, comprising the steps of:

providing a semiconductor substrate;

forming first and second active device regions on a principal surface of the semiconductor substrate;

forming an isolating region around the first and second active device regions;

forming a plurality of first active dummy patterns which are surrounded by the isolating region and are arranged in a first direction, the plurality of the first active dummy patterns having a first pitch;

forming a plurality of second active dummy patterns which are surrounded by the isolating region and are arranged in a second direction, the plurality of second active dummy patterns having a second pitch;

forming a plurality of third active dummy patterns which are surrounded by the isolating region and are arranged in the first direction, the plurality of third active dummy patterns having the first pitch;

forming a plurality of fourth active dummy patterns surrounded by the isolating region, wherein

the first pitch is smaller than the second pitch,

a plane area of one of the first active dummy patterns is smaller than a plane area of one of the second active dummy patterns,

a plane area of one of the third active dummy patterns is smaller than the plane area of the one of the second active dummy patterns,

a plane area of one of the fourth active dummy patterns is smaller than the plane area of the one of the third active dummy patterns, and

the first active device region, the plurality of first active dummy patterns, the plurality of second active dummy patterns, the plurality of third active dummy patterns, and the second active device region are arranged in this order.

18 . The method according to claim 17 , wherein the plane area of the one of the first active dummy patterns is the same as the plane area of the one of the third active dummy patterns.

19 . The method according to claim 18 , wherein a plane shape of the one of the first active dummy patterns is the same as a plane shape of the one of the third active dummy patterns.

20 . The method according to claim 19 , wherein

the isolating region comprises an oxide film in a trench in the principle surface of the semiconductor substrate,

any two of the plurality of first active dummy patterns have the same plane shape and the same plane area as each other,

any two of the plurality of second active dummy patterns have the same plane shape and the same plane area as each other, and

any two of the plurality of third active dummy patterns have the same plane shape and the same plan area as each other.

21 . The method according to claim 20 , wherein

the first, second and third active dummy patterns are each surrounded by the oxide film,

a distance between the nearest first active dummy pattern to the first active device region and the first active device region is shorter than a distance between the nearest second active dummy pattern to the first active device region and the first active device, and

a distance between the nearest third active dummy pattern to the first active device region and the first active device region is shorter than the distance between the nearest second active dummy pattern to the first active device region and the first active device region.

22 . The method according to claim 17 , wherein

a shape of the one of the third active dummy patterns is analogous to a shape of the one of the second active dummy patterns, and

a shape of the one of the first active dummy patterns is analogous to the shape of the one of the second active dummy patterns.

23 . A method for fabricating a semiconductor device comprising the steps of:

providing a semiconductor substrate;

forming a first active device region on a principal surface of the semiconductor substrate;

forming an isolating region around the first active device region;

forming a plurality of first active dummy patterns surrounded by the isolating region, some of the plurality of first active dummy patterns arranged in a first direction and a second direction different from the first direction, the some of the plurality of first active dummy patterns having a first pitch; and

forming a plurality of second active dummy patterns which are surrounded by the isolating region and are arranged in a third direction and a fourth direction different from the third direction, the plurality of second active dummy patterns having a second pitch, wherein

the first pitch is smaller than the second pitch,

any one of plane areas of the first active dummy patterns is smaller than any one of plane areas of the second active dummy patterns, and

any one of plane areas of other of the plurality of first active dummy patterns is smaller than any one of the plane areas of the some of the plurality of the first active dummy patterns.

24 . The method according to claim 23 , wherein

the isolating region comprises an oxide film in a trench in the principle surface of the semiconductor substrate,

any two of some of the plurality of first active dummy patterns have the same plane shape and the same plane area as each other, and

any two of the plurality of second active dummy patterns have the same plane shape and the same plane area as each other.

25 . The method according to claim 24 , wherein

the first, second and third active dummy patterns are each surrounded by the oxide film, and

the second active dummy patterns are arranged in a region more distant from the first active device region than the first active dummy patterns.

26 . The method according to claim 23 , wherein

the first direction is the same as the third direction,

the second direction is the same as the fourth direction, and

a shape of each of the some of the plurality of first active dummy patterns is analogous to the shape of each second active dummy pattern.

27 . The method according to claim 23 , wherein the plurality of first active dummy patterns include some different plane areas.

28 . A method for fabricating a semiconductor device comprising the steps of:

providing a semiconductor substrate;

forming first and second active device regions on a principal surface of the semiconductor substrate;

forming an isolating region around the first and second active device regions;

forming a plurality of first active dummy patterns which are surrounded by the isolating region and are arranged in a first direction, the plurality of the first active dummy patterns having a first pitch;

forming a plurality of second active dummy patterns which are surrounded by the isolating region and are arranged in a second direction, the plurality of second active dummy patterns having a second pitch; and

forming a plurality of third active dummy patterns surrounded by the isolating region, some of the plurality of third active dummy patterns arranged in the first direction, and some of the plurality of third active dummy patterns having the first pitch, wherein

the first pitch is smaller than the second pitch,

a plane area of one of the first active dummy patterns is smaller than a plane area of one of the second active dummy patterns,

a plane area of one of the third active dummy patterns is smaller than the plane area of the one of the second active dummy patterns,

any one of plane areas of other of the plurality of third active dummy patterns is smaller than any one of the plane areas of the some of the plurality of third active dummy patterns, and

the first active device region, the plurality of first active dummy patterns, the plurality of second active dummy patterns, the some of the plurality of third active dummy patterns, and the second active device region are arranged in this order.

29 . The method according to claim 28 , wherein the plane area of the one of the first active dummy patterns is the same as a plane area of one of the some of the plurality of third active dummy patterns.

30 . The method according to claim 29 , wherein a plane shape of the one of the first active dummy patterns is the same as a plane shape of the one of some of the plurality of third active dummy patterns.

31 . The semiconductor device according to claim 28 , wherein

the isolating region comprises an oxide film in a trench in the principle surface of the semiconductor substrate,

any two of the plurality of first active dummy patterns have the same plane shape and the same plane area as each other, and

any two of the plurality of second active dummy patterns have the same plane shape and the same plane area as each other.

32 . The method according to claim 31 , wherein

the first, second and third active dummy patterns are each surrounded by the oxide film,

a distance between the nearest first active dummy pattern to the first active device region and the first active device region is shorter than a distance between the nearest second active dummy pattern to the first active device region and the first active device, and

a distance between the nearest third active dummy pattern to the first active device region and the first active device region is shorter than the distance between the nearest second active dummy pattern to the first active device region and the first active device region.

33 . The method according to claim 28 , wherein

a shape of the one of some of the plurality of third active dummy patterns is analogous to a shape of the one of the second active dummy patterns, and

a shape of the one of the first active dummy patterns is analogous to the shape of the one of the second active dummy patterns.

34 . The method according to claim 28 , wherein the plurality of third active dummy patterns include some different plane areas.

35 . A method for fabricating a semiconductor device, comprising the steps of:

providing a semiconductor substrate;

forming an active device region on a principal surface of the semiconductor substrate;

forming an isolating region around the active device region;

forming at least three different active dummy patterns in an area surrounded by the isolating region such that the largest active dummy patterns are arranged at a position apart from the active device region and smaller dummy patterns are arranged toward the active device region, wherein

the at least three different active dummy patterns include the first active dummy patterns arranged with a first pitch, the second active dummy patterns arranged with a second pitch greater than the first pitch, and the third active dummy patterns,

any one of plane areas of the first active dummy patterns is smaller than any one of plane areas of the second active dummy patterns, and

any one of plane areas of the third active dummy patterns is smaller than any one of the plane areas of the first active dummy patterns.

36 . A method for fabricating a semiconductor device, comprising the steps of:

providing a semiconductor substrate;

forming an active device region on a principal surface of the semiconductor substrate;

forming an isolating region around the active device region;

forming at least three different active dummy patterns in an area surrounded by the isolating region such that the smallest active dummy patterns are arranged in a periphery of the active device region, and larger dummy patterns are arranged toward a position apart from the active device region, wherein

the at least three different active dummy patterns include the first active dummy patterns arranged with a first pitch, the second active dummy patterns arranged with a second pitch greater than the first pitch, and the third active dummy patterns,

any one of plane areas of the first active dummy patterns is smaller than any one of plane areas of the second active dummy patterns, and

any one of plane areas of the third active dummy patterns is smaller than any one of the plane areas of the first active dummy patterns.