IP Library Granted Patent US 7,960,287
Granted Patent B2
US 7,960,287 · App. 12/891,365 · Granted Jun 14, 2011

Methods for fabricating FinFET structures having different channel lengths

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,960,287
App. No.
12/891,365
Granted
Jun 14, 2011
Kind
B2
Abstract

Methods for fabricating FinFET structures having gate structures of different gate widths are provided. The methods include the formation of sidewall spacers of different thicknesses to define gate structures of the FinFET structures with different gate widths. The width of a sidewall spacer is defined by the height of the structure about which the sidewall spacer is formed, the thickness of the sidewall spacer material layer from which the spacer is formed, and the etch parameters used to etch the sidewall spacer material layer. By forming structures of varying height, forming the sidewall spacer material layer of varying thickness, or a combination of these, sidewall spacers of varying width can be fabricated and subsequently used as an etch mask so that gate structures of varying widths can be formed simultaneously.

Claims (20)

1. A method for fabricating semiconductor devices having first channel lengths and second narrower channel lengths, the method comprising the steps of:

providing a hard mask layer overlying a gate-forming material layer;

depositing a first mandrel-forming material overlying the hard mask layer;

depositing a second mandrel-forming material overlying the first mandrel-forming material;

etching the second mandrel-forming material and the first mandrel-forming material such that a first plurality of mandrels comprising the first mandrel-forming material and the second mandrel-forming material and a second plurality of mandrels comprising the first mandrel-forming material are formed;

depositing a sidewall spacer-forming material overlying the first plurality of mandrels and the second plurality of mandrels;

anisotropically etching the sidewall spacer-forming material to form sidewall spacers about sidewalls of each of the first plurality of mandrels and the second plurality of mandrels;

removing the first plurality of mandrels and the second plurality of mandrels;

etching the hard mask layer using the sidewall spacers as an etch mask; and

etching the gate-forming material layer using the etched hard mask layer as an etch mask.

2. The method of claim 1 , further comprising the steps of:

forming an etch stop layer overlying the first mandrel-forming material before the step of depositing a second mandrel-forming material; and

wherein the step of etching the second mandrel-forming material and the first mandrel-forming material comprises etching the second mandrel-forming material, the etch stop layer, and the first mandrel-forming material.

3. The method of claim 1 , further comprising removing the second mandrel-forming material overlying a portion of the first mandrel-forming material before the step of etching the second mandrel-forming material and the first mandrel-forming material.

4. The method of claim 3 , wherein the step of etching the second mandrel-forming material and the first mandrel-forming material comprises removing the second mandrel-forming material from the second plurality of mandrels.

5. The method of claim 1 , further comprising the step of removing the sidewall spacers after the step of etching the hard mask layer and before the step of etching the gate-forming material layer.

6. The method of claim 1 , wherein the step of etching the gate-forming material layer comprises forming first gate structures having widths substantially equal to the first channel lengths and second gate structures having widths substantially equal to the second narrower channel lengths.

7. The method of claim 6 , wherein the step of etching the second mandrel-forming material and the first mandrel-forming material comprises forming a first plurality of mandrels having a pitch that is twice the pitch of the first gate structures.

8. The method of claim 7 , wherein the step of etching the second mandrel-forming material and the first mandrel-forming material comprises forming a second plurality of mandrels having a pitch that is twice the pitch of the second gate structures.

9. The method of claim 1 , wherein the step of anisotropically etching comprises anistropically etching the sidewall spacer-forming material to form first sidewall spacers about the sidewalls of each of the first plurality of mandrels and second sidewall spacers about the sidewalls of the second plurality of mandrels, wherein the first sidewall spacers have a width that is substantially equal to the first channel lengths and the second sidewall spacers have a width that is substantially equal to the second narrower channel lengths.

Assignments (3)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2018
From: GLOBALFOUNDRIES INC.
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 047039/0957 →