IP Library Patent Application 12894101
Patent Application
App. No. 12/894,101

SYSTEM AND METHOD FOR FAST POWER GRID AND SUBSTRATE NOISE SIMULATION

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Quick Facts
Patent No.
US None
App. No.
12/894,101
Abstract

Systems and methods related to fast simulation of power supply networks and identification of a set of extrema (e.g., maxima or minima) waveforms associated with the power supply networks. In accordance with an embodiment, a method is provided for simulating an electrical circuit, comprising preselecting an input vector file, initializing a supply voltage to a fixed value, performing event driven simulation using the input vector file, so as to extract time-varying power supply current waveforms at a plurality of power grid points. The method also comprises simulating a power grid using a linear network simulator or other SPICE type simulation tool, so as to derive time-varying voltage waveforms from the current waveforms for each point on the power grid. The method further comprises comparing current and/or voltage waveforms with a previous simulation; and repeating the above steps from event driven simulation onwards, using a function of voltage waveforms from previous simulations, until the values of current and/or voltage waveforms converge within a pre-specified tolerance, or an iteration limit has been reached.

Claims (48)

1 . A method for simulating an electrical circuit, comprising:

preselecting an input vector file;

initializing a supply voltage to a fixed value;

performing event driven simulation using the input vector file, so as to extract time-varying power supply current waveforms at a plurality of power grid points;

simulating a power grid using a linear network simulator or other SPICE type simulation tool, so as to derive time-varying voltage waveforms from the current waveforms for each point on the power grid;

comparing current and/or voltage waveforms with a previous simulation; and

repeating the above steps from event driven simulation onwards, using a function of voltage waveforms from previous simulations, until

the values of current and/or voltage waveforms converge within a pre-specified tolerance, or

an iteration limit has been reached.

2 . The method of claim 1 wherein the function of voltage waveforms is a weighted average of voltage values at each time step.

3 . The method of claim 1 wherein the model of the power grid is an R, RC, RL, RLC or RLCK circuit.

4 . The method of claim 1 wherein each event in the event driven simulation is defined in a data structure which includes parameters characterizing the state of a node in the circuit associated with that event and a start time and end time of the event.

5 . The method of claim 4 wherein if multiple events are defined for the same node in the circuit then:

determining if the multiple events occur substantially simultaneously based on their start and end times;

collapsing the substantially simultaneous events into one event; and

selecting a new event from a library of events that characterizes the substantially simultaneous events.

6 . The method of claim 5 further comprising:

determining if the multiple events result in a glitch;

applying electrical masking to the glitch.

7 . The method of claim 1 wherein for each iteration, analyzing a previous event and modifying a current event based on the output characteristics of the previous event.

8 . The method of claim 1 wherein if the current and voltage waveforms do not converge then obtaining current waveforms from a new event driven simulation, applying these to their corresponding points and resimulating the power grid.

9 . The method of claim 1 wherein substrate current waveforms are extracted at a plurality of substrate points after the final iteration and are used for analyzing noise distribution in an integrated circuit (IC) substrate, by simulating the substrate current waveforms along with a model of the IC substrate in a linear network simulator or similar SPICE type tool.

10 . The method of claim 9 wherein the model of the IC substrate can be an R or RC model.

11 . A system for simulating an electrical circuit, comprising:

a computer, including a computer readable medium and processor operating thereon; and

a simulation tool, executing on the computer, wherein the simulation tool is operable to

preselect an input vector file;

initialize a supply voltage to a fixed value;

perform event driven simulation using the input vector file, so as to extract time-varying power supply current waveforms at a plurality of power grid points;

simulate a power grid using a linear network simulator or other SPICE type simulation tool, so as to derive time-varying voltage waveforms from the current waveforms for each point on the power grid;

compare current and/or voltage waveforms with a previous simulation; and

repeat the above steps from event driven simulation onwards, using a function of voltage waveforms from previous simulations, until

the values of current and/or voltage waveforms converge within a pre-specified tolerance, or

an iteration limit has been reached.

12 . The system of claim 9 wherein the function of voltage waveforms is a weighted average of voltage values at each time step.

13 . The system of claim 9 wherein the model of the power grid is an R, RC, RL, RLC or RLCK circuit.

14 . The system of claim 9 wherein each event in the event-driven simulation is defined in a data structure which includes parameters characterizing the state of a node in the circuit associated with that event and a start time and end time of the event.

15 . The system of claim 14 wherein if multiple events are defined for the same node in the circuit then:

determining if the multiple events occur substantially simultaneously based on their start and end times;

collapsing the substantially simultaneous events into one event; and

selecting a new event from a library of events that characterizes the substantially simultaneous events.

16 . The system of claim 15 further comprising:

determining if the multiple events result in a glitch;

applying electrical masking to the glitch.

17 . The system of claim 11 wherein for each iteration, analyzing a previous event and modifying a current event based on the output characteristics of the previous event.

18 . The system of claim 11 wherein if the current and voltage waveforms do not converge then obtaining current waveforms from a new event driven simulation, applying these to their corresponding points and resimulating the power grid.

19 . The system of claim 11 wherein substrate current waveforms are extracted at a plurality of substrate points after the final iteration and are used for analyzing noise distribution in an integrated circuit (IC) substrate, by simulating the substrate current waveforms along with a model of the IC substrate in a linear network simulator or similar SPICE type tool.

20 . The system of claim 11 wherein the model of the IC substrate can be an R or RC model.

Assignments (2)
MERGER Recorded Mar 5, 2015
From: NANOTROPIC S.S.
To: HELIC, INC.
Reel/Frame 035098/0069 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2011
From: STAMOULIS, GEORGIOS; BANTAS, SOTIRIOS; BOUNTAS, DIMITRIOS; EVMORFOPOULOS, NESTORAS; TSIAMPAS, MICHAEL; MERAKOS, PANAYOTIS
To: NANOTROPIC S.A
Reel/Frame 025659/0833 →