Liquid crystal display device and electronic device including the liquid crystal display device
In a liquid crystal display device including a plurality of pixels in a display portion and configured to performed display in a plurality of frame periods, each of the frame periods includes a writing period and a holding period, and after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period. The pixel includes a semiconductor layer including an oxide semiconductor layer, and the oxide semiconductor layer has a carrier concentration of less than 1×10 14 /cm 3 .
1. A method for driving a liquid crystal display device comprising a plurality of pixels in a display portion and configured to perform display in a plurality of frame periods,
wherein each of the plurality of frame periods includes a writing period and a holding period,
wherein after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period,
wherein the transistor comprises a semiconductor layer including an oxide semiconductor,
wherein a concentration of hydrogen in the oxide semiconductor, which is measured by secondary ion mass spectrometry, is 5×10 19 /cm 3 or less, and
wherein the display portion includes a liquid crystal layer comprising any one selected from a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a vertical alignment (VA) mode and a blue phase.
2. The method for driving the liquid crystal display device according to claim 1 , wherein the image signal is held for 1 minute or longer and shorter than 10 minutes in the holding period.
3. The method for driving the liquid crystal display device according to claim 1 , wherein the oxide semiconductor has a carrier concentration of less than 1×10 14 /cm 3 .
4. The method for driving the liquid crystal display device according to claim 1 ,
wherein a current per micrometer of a channel width of the semiconductor layer is 1×10 −17 A or less by applying a voltage in a range of 1 V to 10 V to a portion of the semiconductor layer and a voltage in a range of −5 V to −20 V to a gate of the transistor.
5. The method for driving the liquid crystal display device according to claim 1 , wherein the liquid crystal display device is included in an electronic device.
6. A method for driving a liquid crystal display device comprising a plurality of pixels in a display portion and configured to perform display in a plurality of frame periods,
wherein each of the plurality of frame periods includes a writing period and a holding period, and
wherein after an image signal is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period, and
wherein the display portion includes a liquid crystal layer comprising any one selected from a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a vertical alignment (VA) mode and a blue phase.
7. The method for driving the liquid crystal display device according to claim 6 , wherein the image signal is held for 1 minute or longer and shorter than 10 minutes in the holding period.
8. The method for driving the liquid crystal display device according to claim 6 , wherein the transistor comprises a semiconductor layer including an oxide semiconductor, and the oxide semiconductor has a carrier concentration of less than 1×10 14 /cm 3 .
9. The method for driving the liquid crystal display device according to claim 8 , wherein a current per micrometer of a channel width of the semiconductor layer is 1×10 −17 A or less by applying a voltage in a range of 1V to 10 V to a portion of the semiconductor layer and a voltage in a range of −5 V to −20 V to a gate of the transistor.
10. The method for driving the liquid crystal display device according to claim 6 , wherein the liquid crystal display device is included in an electronic device.
11. A method for driving a liquid crystal display device comprising a plurality of pixels in a display portion and configured to perform display in a plurality of frame periods,
wherein each of the plurality of frame periods includes a writing period and a holding period,
wherein after an image signal with a voltage whose polarity is inverted a plurality of times is input to each of the plurality of pixels in the writing period, a transistor included in each of the plurality of pixels is turned off and the image signal is held for at least 30 seconds in the holding period, and
wherein the display portion includes a liquid crystal layer comprising any one selected from a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a vertical alignment (VA) mode and a blue phase.
12. The liquid crystal display device according to claim 11 , wherein a polarity of the voltage of the image signal held at each of the plurality of pixels in the holding period is a polarity of the voltage supplied at the end of the writing period.
13. The method for driving the liquid crystal display device according to claim 11 , wherein the image signal is held for 1 minute or longer and shorter than 10 minutes in the holding period.
14. The liquid crystal display device according to claim 11 , wherein the transistor comprises a semiconductor layer including an oxide semiconductor, and the oxide semiconductor has a carrier concentration of less than 1×10 14 /cm 3 .
15. The liquid crystal display device according to claim 14 ,
wherein a current per micrometer of a channel width of the semiconductor layer is 1×10 −17 A or less by applying a voltage in a range of 1 V to 10 V to a portion of the semiconductor layer and a gate voltage in a range of −5 V to −20 V to a gate of the transistor.
16. An electronic device comprising the liquid crystal display device according to claim 11 .