Test system and probe apparatus

1. A probe apparatus to be electrically connected to a semiconductor wafer on which a plurality of semiconductor chips are formed, comprising:

a wire substrate provided with a plurality of terminals;

a wafer tray forming a hermetically sealed space with the wire substrate, and for mounting the semiconductor wafer on a surface of the wafer tray nearer the hermetically sealed space;

a probe wafer provided between the wire substrate and the wafer tray, where apparatus connection terminals provided on a surface of the probe wafer nearer the wire substrate are electrically connected to terminals of the wire substrate, and where a plurality of wafer connection terminals provided on a surface of the probe wafer nearer the wafer tray are electrically connected to the plurality of semiconductor chips respectively in a collective manner;

an apparatus anisotropic conductive sheet provided between the wire substrate and the probe wafer and, by being pressed, electrically connecting the terminals of the wire substrate to the apparatus connection terminals;

a wafer anisotropic conductive sheet provided between the probe wafer and the semiconductor wafer and, by being pressed, electrically connecting each terminal of the semiconductor wafer to each of the plurality of wafer connection terminals; and

a decompressing section that decompresses the hermetically sealed space between the wire substrate and the wafer tray, so as to cause the wafer tray to move to a predetermined position from the wire substrate, to electrically connect the wire substrate and the probe wafer, and to electrically connect the probe wafer and the semiconductor wafer.

2. The probe apparatus according to claim 1 , wherein

penetrating holes are provided through the probe wafer to connect a wafer-tray-side space to a wire-substrate-side space.

3. The probe apparatus according to claim 2 , further comprising:

a membrane provided to oppose a surface of the wafer anisotropic conductive sheet nearer the wafer tray, and electrically connecting the wafer anisotropic conductive sheet and the semiconductor wafer, wherein

penetrating holes are provided through the membrane to connect the wafer-tray-side space to the wire-substrate-side space.

4. The probe apparatus according to claim 3 , further comprising:

an apparatus sealing section formed by an elastic material, and provided along a periphery of a surface of the membrane nearer the wire substrate to seal between the periphery of the surface of the membrane nearer the wire substrate and the wire substrate; and

a wafer sealing section formed by an elastic material, and provided on a surface of the wafer tray in a region corresponding to the periphery of the membrane to seal between a periphery of a surface of the membrane nearer the wafer tray and the wafer tray.

5. The probe apparatus according to claim 4 , wherein

the wafer tray is provided with an air inlet path for decompressing a space between the wafer tray and the probe wafer, the air inlet path including an opening on a surface of the wafer tray on which the semiconductor wafer is to be mounted outside a region on which the semiconductor wafer is to be mounted, the opening positioned within a region surrounded by the wafer sealing section.

6. The probe apparatus according to claim 5 , wherein

the wafer tray is further provided with an air inlet path for semiconductor wafer, the air inlet path for semiconductor wafer including an opening on a region of a surface of the wafer tray nearer the hermetically sealed space on which the semiconductor wafer is to be mounted, and

the decompressing section causes the semiconductor wafer to attach by suction to the wafer tray via the air inlet path for semiconductor wafer.

7. The probe apparatus according to claim 6 , wherein

the decompressing section includes a decompressor for hermetically sealed space for intaking air through an air inlet path for hermetically sealed space and a decompressor for semiconductor wafer for intaking air through the air inlet path for semiconductor wafer.

8. The probe apparatus according to claim 7 , wherein

the wafer tray is provided with an air containing space connected to any of the air inlet paths and having a diameter larger than a diameter of the air inlet path.

9. The probe apparatus according to claim 8 , wherein

the wafer tray is provided with air containing spaces respectively for the air inlet path for hermetically sealed space and for the air inlet path for semiconductor wafer.

10. The probe apparatus according to claim 5 , comprising:

a first probe wafer electrically connected to the wire substrate; and

a second probe wafer provided between the first probe wafer and the semiconductor wafer, and electrically connected to the first probe wafer and the semiconductor wafer, wherein

the first probe wafer and the second probe wafer are respectively provided with the penetrating holes, to connect a space created from the first probe wafer towards the wire substrate to a space created from the second probe wafer towards the wafer tray.

11. The probe apparatus according to claim 5 , wherein

the probe wafer is provided with a plurality of circuitry sections so that at least one circuitry section is provided for each one of the semiconductor chips to test the semiconductor chip.

12. A test system for testing a plurality of semiconductor chips formed on a single semiconductor wafer, comprising:

a plurality of test modules for testing the semiconductor chips respectively; and

a probe apparatus electrically connecting each of the test modules to a corresponding one of the semiconductor chips, wherein

the probe apparatus including:

a wire substrate provided with a plurality of terminals;

a wafer tray forming a hermetically sealed space with the wire substrate, and for mounting the semiconductor wafer on a surface of the wafer tray nearer the hermetically sealed space;

a probe wafer provided between the wire substrate and the wafer tray, where apparatus connection terminals provided on a surface of the probe wafer nearer the wire substrate are electrically connected to terminals of the wire substrate, and where a plurality of wafer connection terminals provided on a surface of the probe wafer nearer the wafer tray are electrically connected to the plurality of semiconductor chips respectively in a collective manner;

an apparatus anisotropic conductive sheet provided between the wire substrate and the probe wafer and, by being pressed, electrically connecting the terminals of the wire substrate to the apparatus connection terminals;

a wafer anisotropic conductive sheet provided between the probe wafer and the semiconductor wafer and, by being pressed, electrically connecting each terminal of the semiconductor wafer to each of the plurality of wafer connection terminals; and

a decompressing section that decompresses the hermetically sealed space between the wire substrate and the wafer tray, so as to cause the wafer tray to move to a predetermined position from the wire substrate, to electrically connect the wire substrate and the probe wafer, and to electrically connect the probe wafer and the semiconductor wafer.