Method for fabrication of a semiconductor device and structure
View Patent ↗Systems and methods are disclosed for fabricating a semiconductor device, includes implanting one or more regions on a semiconductor wafer; performing a layer transfer onto a carrier; and transferring from said carrier to a target wafer.
1. An Integrated Circuit device, comprising:
a first layer of single crystal including a plurality of first transistors;
at least one metal layer providing interconnection between said first transistors, a second layer of less than 2 micron thin single crystal having a plurality of second transistors, and
a plurality of through-layer-vias (TLV) conducting power to said plurality of second transistors;
wherein said plurality of through-layer-vias comprise a thermal conducting path to a heat sink.
2. A device according to claim 1 wherein said device is part of a mobile system.
3. A device according to claim 1 , wherein at least one of said second transistors is a horizontally oriented transistor and wherein said metal layer comprises aluminum or copper.
4. A device according to claim 1 , wherein at least one of said second transistors comprises a high-K-Metal gate (HKMG) formed using a gate last process.
5. A device according to claim 1 , wherein said second layer is constructed by an ion-cut layer transfer process.
6. A device according to claim 1 wherein said thermal conducting path comprises an electrically non-conducting path.
7. A device according to claim 1 , wherein said thermal conducting path comprises a heat spreader layer.
8. A device according to claim 1 , wherein said thermal conducting path has a thermal conductivity of at least 400 W/m-K.
9. An Integrated Circuit device, comprising:
a first layer of single crystal including a plurality of first transistors;
a plurality of metal layers providing interconnection between said first transistors, wherein said metal layers comprises copper or aluminum;
a second layer of less than 2 micron thin single crystal including a plurality of second transistors overlaying said metal layers, and
a thermal conducting path from said second layer to a heat sink wherein said thermal conducting path has a thermal conductivity of at least 400 W/m-K.
10. An Integrated Circuit device according to claim 9 , wherein said second transistors comprises a horizontally oriented transistor.
11. A device according to claim 9 wherein said device is part of a mobile system.
12. A device according to claim 9 , wherein at least one of said second transistors is defined by etching.
13. A device according to claim 9 , wherein at least one of said second transistors is a high-K-Metal gate (HKMG) transistor.
14. A device according to claim 13 , wherein at least one of said second transistors is formed by a gate replacement process.
15. A device according to claim 9 , wherein said second layer is constructed by an ion-cut layer transfer process.
16. A device according to claim 9 wherein said thermal conducting path comprises an electrically non-conducting path.
17. A device according to claim 9 wherein said thermal conducting path comprises a power conduction path to at least one of said second transistors.
18. A device according to claim 9 , wherein said thermal conducting path comprises a heat spreader layer.
19. An Integrated Circuit device, comprising:
a first layer of single crystal comprising a plurality of first transistors;
a plurality of metal layers providing interconnection between said first transistors,
wherein said metal layers comprise copper or aluminum;
a second layer of single crystal comprising a plurality of second transistors,
wherein said second layer is less than 2 microns thick;
a layer of heat spreader in between said first layer and said second layer of single crystal; and
a thermal conducting path from said second layer to a heat sink.
20. A device according to claim 19 , wherein at least one of said second transistors has a side gate.
21. A device according to claim 19 wherein said device is part of a mobile system.
22. A device according to claim 19 , wherein said second layer is constructed by an ion-cut layer transfer process.
23. A device according to claim 19 , wherein said thermal conducting path has a thermal conductivity of at least 400 W/m-K.
24. A device according to claim 19 wherein said thermal conducting path comprises an electrically non-conducting path.
25. A device according to claim 19 further comprising a thermal conducting path from said second layer to said heat spreader.
26. A device according to claim 25 , wherein said thermal conducting path has a thermal conductivity of at least 400 W/m-K.
27. A device according to claim 25 , wherein said thermal conducting path comprises a power conduction path to at least one of said second transistors.
28. A device according to claim 25 wherein said thermal conducting path comprises an electrically non-conducting path.