IP Library Granted Patent US 8,791,546
Granted Patent B2
US 8,791,546 · App. 12/909,632 · Granted Jul 29, 2014

Bipolar transistors having emitter-base junctions of varying depths and/or doping concentrations

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Quick Facts
Patent No.
US 8,791,546
App. No.
12/909,632
Granted
Jul 29, 2014
Kind
B2
Abstract

A bipolar transistor comprises at least first and second connected emitter-base (EB) junctions having, respectively, different first and second EB junction depths, and a buried layer (BL) collector having a greater third depth. The emitters and bases corresponding to the different EB junctions are provided during a chain implant. An isolation region overlies the second EB junction location thereby providing its shallower EB junction depth. The BL collector does not underlie the first EB junction and is laterally spaced therefrom by a variable amount to facilitate adjusting the transistor's properties. In other embodiments, the BL collector can underlie at least a portion of the second EB junction. Regions of opposite conductivity type over-lie and under-lie the BL collector, which is relatively lightly doped, thereby preserving the breakdown voltage. The transistor can be readily “tuned” by mask adjustments alone to meet various device requirements.

Claims (31)

1. A bipolar transistor, comprising:

a semiconductor substrate having a first surface;

a first emitter region of a first conductivity type in the semiconductor substrate having a first emitter region doping concentration;

a first base region of a second, opposite, conductivity type in the semiconductor substrate underlying the first emitter region and having a first base region doping concentration, the first base region forming a first PN or NP junction with the first emitter region at a first depth from the first surface;

a second emitter region of the first conductivity type in the semiconductor substrate having a second emitter region doping concentration and Ohmically coupled to the first emitter region;

a second base region of the second conductivity type in the semiconductor substrate underlying the second emitter region and having a second base region doping concentration greater than the first base doping concentration, the second base region forming a second PN or NP junction with the second emitter region at a second depth from the first surface less than the first depth; and

a buried layer collector region of the first conductivity type in the substrate underlying the first surface and laterally spaced a third distance from the first emitter region.

2. The transistor of claim 1 , wherein the first emitter region and the second emitter region are laterally adjacent.

3. The transistor of claim 1 , wherein the first base region and the second base region are laterally adjacent.

4. The transistor of claim 1 , wherein the second emitter region lies laterally at least partly between the first emitter region and the buried layer collector region.

5. The transistor of claim 1 , wherein the second base region lies laterally at least partly between the first base region and the buried layer collector region.

6. The transistor of claim 1 , further comprising a third emitter region of a third emitter doping concentration and a third base region of a third base doping concentration, wherein the third emitter region is coupled to the first emitter region and the third base region is coupled to the first base region and the third base doping concentration is less than the first base doping concentration.

7. The transistor of claim 1 , wherein the second emitter region has a lateral extent greater than the third distance.

8. The transistor of claim 1 , wherein the second emitter region has a lateral extent less than the third distance.

9. A bipolar transistor, comprising:

a semiconductor substrate having a first surface;

a first emitter region of a first conductivity type in the semiconductor substrate having a first emitter region doping concentration;

a first base region of a second, opposite, conductivity type in the semiconductor substrate underlying the first emitter region and having a first base region doping concentration, the first base region forming a first PN or NP junction with the first emitter region at a first depth from the first surface;

a second emitter region of the first conductivity type in the semiconductor substrate having a second emitter region doping concentration and Ohmically coupled to the first emitter region;

a second base region of the second conductivity type in the semiconductor substrate underlying the second emitter region and having a second base region doping concentration greater than the first base doping concentration, the second base region forming a second PN or NP junction with the second emitter region at a second depth from the first surface;

an isolation feature overlying the second emitter region; and

an emitter contact in the first emitter region and adjacent the isolation feature, the juncture between the emitter contact and the isolation feature generally aligning with the juncture between the first emitter region and the second emitter region and the juncture between the first base region and the second base region.

10. The transistor of claim 9 , wherein the semiconductor substrate comprises an upper epitaxial layer in which the first emitter region and the second emitter region are located.

11. The transistor of claim 10 , wherein the semiconductor substrate further comprises a lower epitaxial layer in which the buried layer collector region is located at least in substantial part.

12. The transistor of claim 9 , further comprising:

a base contact;

a WELL region of the second conductivity type in ohmic contact with the base contact; and

a buried layer collector region of the first conductivity type in the substrate underlying the first surface and having a portion extending under the WELL region.

13. The transistor of claim 12 , wherein the second emitter region extends laterally from the first emitter region to the WELL region.

14. The transistor of claim 9 , wherein the second emitter region doping concentration is less than the first emitter region doping concentration by a factor of about 1 to 100.

15. The transistor of claim 9 , wherein the second base region doping concentration is greater than the first base region doping concentration by a factor of about 1 to 10.

Assignments (26)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
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