Field effect transistor and method of manufacturing the same
A field effect transistor according to the present invention includes A field effect transistor, comprising: a nitride-based semiconductor multilayer structure, at least including, a drift layer formed of n-type or i-type AlxGa 1-x N (0≦X≦0.3), a barrier layer formed of i-type Al Y Ga 1-Y (Y>X), an electron supply layer formed of n-type Al Y Ga 1-Y N, and a channel layer formed of i-type GaN or InGaN, that are epitaxially grown on a substrate in this order, from the side of the substrate, a suitable buffer layer being interposed between the substrate and the nitride-based semiconductor multilayer structure; a gate electrode formed in a part of a front surface of the channel layer with an insulating film interposed therebetween; an n + type connection region in which n-type impurities are doped with the density of 1×10 18 cm −3 or more, in a range from at least a part of a channel layer to a part of the drift layer, adjacent to one side in a planer direction of an area where the gate electrode is formed; a source electrode formed on a front surface of the semiconductor layer in the opposite side of the n + type connection region with respect to the gate electrode; and a drain electrode formed on a back surface of the substrate.
1. A field effect transistor, comprising:
a nitride-based semiconductor multilayer structure, at least including, a drift layer formed of n-type or i-type AlxGa 1-X N(0≦X≦0.3), a barrier layer formed of i-type Al Y Ga 1-Y N (Y>X), an electron supply layer formed of n-type Al Y Ga 1-Y N, and a channel layer formed of i-type GaN or InGaN, that are epitaxially grown on a substrate in this order, from a side of the substrate, a suitable buffer layer being interposed between the substrate and the nitride-based semiconductor multilayer structure;
a gate electrode formed in a part of a front surface of the channel layer with an insulating film interposed therebetween;
an n + type connection region in which n-type impurities are doped with the density of 1×10 18 cm −3 or more, in a range from at least a part of a channel layer to a part of the drift layer, adjacent to one side in a planer direction of an area where the gate electrode is formed;
a source electrode formed on a front surface of the nitride-based semiconductor multilayer structure in the opposite side of the n + type connection region with respect to the gate electrode; and
a drain electrode formed on a back surface of the substrate.
2. The field effect transistor according to claim 1 , wherein the source electrode is formed on a source contact domain, the source contact region being formed by doping n-type impurities with the density of 1×10 18 cm −3 or more to a part of the front surface of the channel layer.
3. The field effect transistor according to claim 1 , wherein the source electrode is formed on a source contact layer formed of n-type or i-type Al Z Ga 1-Z N (Z>Y) formed on the front surface of the channel layer.
4. The field effect transistor according to claim 1 , wherein the whole area of the n + type connection region is formed of GaN where n-type impurities are doped with the density of 1×10 18 cm −3 or more.
5. The field effect transistor according to claim 1 , wherein the drain electrode is formed to contact the nitride-based semiconductor multilayer structure in a trench ditch which is formed to reach the nitride-based semiconductor multilayer structure from the back surface of the substrate.
6. The field effect transistor according to claim 2 , wherein the whole area of the n + type connection region is formed of GaN where n-type impurities are doped with the density of 1×10 18 cm −3 or more.
7. The field effect transistor according to claim 3 , wherein the whole area of the n + type connection region is formed of GaN where n-type impurities are doped with the density of 1×10 18 cm −3 or more.
8. The field effect transistor according to claim 2 , wherein the drain electrode is formed to contact the nitride-based semiconductor multilayer structure in a trench ditch which is formed to reach the nitride-based semiconductor multilayer structure from the back surface of the substrate.
9. The field effect transistor according to claim 3 , wherein the drain electrode is formed to contact the nitride-based semiconductor multilayer structure in a trench ditch which is formed to reach the nitride-based semiconductor multilayer structure from the back surface of the substrate.
10. The field effect transistor according to claim 4 , wherein the drain electrode is formed to contact the nitride-based semiconductor multilayer structure in a trench ditch which is formed to reach the nitride-based semiconductor multilayer structure from the back surface of the substrate.
11. A method of mean manufacturing a field effect transistor, comprising:
forming a nitride-based semiconductor multilayer structure by epitaxially growing, on a substrate, at least a drift layer formed of n-type or i-type Al X Ga 1-X N (0≦X≦0.3), a barrier layer formed of i-type Al Y Ga 1-Y N(Y>X), an electron supply layer formed of n-type Al Y Ga 1-Y N, and a channel layer formed of i-type GaN or InGaN, in this order, from a side of the substrate, a suitable buffer layer being interposed between the substrate and the nitride-based semiconductor multilayer structure;
forming a gate electrode in a part of a front surface of the channel layer with an insulating film interposed therebetween;
forming an n + type connection region in which n-type impurities are doped with the density of 1×10 18 cm −3 or more, in a range from at least a part of the channel layer to a part of the drift layer, adjacent to one side in a planer direction of an area where the gate electrode is formed;
forming a source electrode on a front surface of the nitride-based semiconductor multilayer structure in the opposite side of the n + type connection region with respect to the gate electrode; and
forming a drain electrode on a back surface of the substrate.