IP Library Granted Patent US 7,995,674
Granted Patent B2
US 7,995,674 · App. 12/929,083 · Granted Aug 9, 2011

Digital predistortion transmitter

Assignee: Hitachi, Ltd.
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Quick Facts
Patent No.
US 7,995,674
App. No.
12/929,083
Granted
Aug 9, 2011
Kind
B2
Abstract

There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.

Claims (12)

1. A transmitter comprising:

a DA converter which converts complex signal into analog signal;

a power amplifier which amplifies the analog signal to be outputted and outputs an output signal with the amplified analog signal;

an AD converter which coverts the output signal into an outputted complex signal;

a coefficient vector generator which generates a coefficient vector on the basis of the outputted complex signal and a first input complex signal inputted from an external of the transmitter;

a digital predistortor includes

a signal vector generator which generates a signal vector on the basis of the first complex input signal and a second complex input signal which has been inputted before the first input complex signal;

a complex signal generator which generates the complex signal to be converted by the DA converter on the basis of the coefficient vector and the signal vector.

2. A transmitter according to claim 1 ,

further comprises a memory which holds the second complex input signal wherein the signal vector generator obtains the second complex input signal from the memory for generating a signal vector.

3. A transmitter according to claim 1 ,

wherein the coefficient vector generator which generates a residual signal on the basis of difference between the first complex input signal and the outputted complex signal.

Assignments (2)
MERGER Recorded Dec 29, 2010
From: HITACHI COMMUNICATIONS TECHNOLOGIES, LTD.
To: HITACHI, LTD.
Reel/Frame 026273/0055 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2010
From: HORI, KAZUYUKI; MURAKAMI, SHOUHEI; UCHIIKE, TOMOYA; ISHIDA, YUJI; HASEGAWA, YOSHIAKI
To: HITACHI COMMUNICATION TECHNOLOGIES, LTD.
Reel/Frame 025632/0985 →
Priority Claims (1)
JP 2006-108211 · Apr 11, 2006 · national
Continuity (2)
Continuation 11703768 · Feb 8, 2007
Related Publication 20110096865A1 · Apr 28, 2011