Semiconductor device and manufacturing method of the same
View Patent ↗In a semiconductor device, capacitance between copper interconnections is decreased and the insulation breakdown is improved simultaneously, and a countermeasure is taken for misalignment via by a manufacturing method including the steps of forming an interconnection containing copper as a main ingredient in an insulative film above a substrate, forming insulative films and a barrier insulative film for a reservoir pattern, forming an insulative film capable of suppressing or preventing copper from diffusing on the upper surface and on the lateral surface of the interconnection and above the insulative film and the insulative film, forming insulative films of low dielectric constant, in which the insulative film is formed such that the deposition rate above the opposing lateral surfaces of the interconnections is larger than the deposition rate therebelow to form an air gap between the adjacent interconnections and, finally, planarizing the insulative film by interlayer CMP.
1. A semiconductor device having a plurality of interconnection layers, comprising:
a first interconnection layer having a predetermined region;
a second interconnection layer above the first interconnection layer;
an interlayer dielectric between the first interconnection layer and the second interconnection layer; and
a barrier insulation film between the interlayer dielectric and interconnections of the first interconnection layer;
wherein the thickness of the barrier insulation film on an upper portion of interconnections in the predetermined region is thicker than the thickness of the barrier insulation film on an upper portion of interconnections in a remaining area other than the predetermined region, and
wherein an air gap is presented between adjacent interconnections in the remaining area and an air gap is not presented between adjacent interconnections in the predetermined region.
2. A semiconductor device according to claim 1 , wherein the most upper part of the air gap is projecting above the top of the interconnections of the first interconnection layer.
3. A semiconductor device according to claim 1 , wherein a plurality of the predetermined region are presented.
4. A semiconductor device according to claim 1 , further comprising:
a via which is formed through the interlayer dielectric to connect electrically between a interconnection of the first interconnection layer and a interconnection of the second interconnection layer,
wherein the via is formed in the predetermined region and the via is not formed in the remaining area.
5. A semiconductor device according to claim 1 ,
wherein the barrier insulation film on the upper portion of interconnections in the predetermined region comprises a first layer formed on interconnections of the first interconnection layer and a second layer formed on the first layer, and
wherein the barrier insulation film on the upper portion of interconnections in the remaining area comprises the second layer formed on interconnections of the first interconnection layer.
6. A semiconductor device according to claim 1 , wherein interconnections of the first interconnection layer comprise a first conductive barrier film and a main conductor film comprising copper on the first conductive barrier film.
7. A semiconductor device according to claim 4 , wherein the via and interconnections of the second interconnection layer comprise a second conductive barrier film and a main conductor film comprising copper on the second conductive barrier film.
8. A semiconductor device according to claim 1 , wherein the interlayer dielectric comprises an SiOF film or an SiOC film.
9. A semiconductor device according to claim 1 , wherein the interlayer dielectric is presented between interconnections of the first interconnection layer in the remaining area.
10. A semiconductor device according to claim 9 , wherein an insulation film is presented between interconnections of the first interconnection layer in the predetermined region.
11. A semiconductor device according to claim 10 ,
wherein the insulation film comprises a lower layer, an intermediate layer and an upper layer,
wherein the lower layer comprises a silicon nitride film, a silicon carbide film, a silicon carbonitride film, or a silicon oxynitride film,
wherein the intermediate film comprises an SiOF film or an SiOC film, and
wherein the upper layer film comprises a silicon oxide film.
12. A semiconductor device according to claim 1 , wherein the barrier insulation film comprises a silicon nitride film, a silicon carbide film, a silicon carbonitride film, or a silicon oxynitride film.