Self-adaptive current-mode-control circuit for a switching regulator

1. A current-mode-control circuit for a switching regulator, comprising:

a first transistor coupled to a power supply voltage and to a first node; a second transistor coupled to the first node; an inductor coupled between the first node and an output of the current-mode control circuit; a slope compensation generation circuit coupled to the output of the current-mode control circuit through a feedback loop, and generating a slope compensation current proportional to the output of the current-mode-control circuit, related the slope compensation generation circuit comprising: a math operation circuit receiving the output of the current control circuit; a slope voltage formation circuit, different from the math operation circuit, coupled to the math operation circuit; and a voltage-to-current conversion circuit coupled to the slope voltage formation circuit; an inductor current sense circuit coupled to the first node, and configured to calculate a current through the inductor and output an inductor sense current; and a pulse-width modulation (PWM) control circuit having an output and an inverted output, an input of the inductor current sense circuit being coupled to the output of the PWM control circuit and a gate of the first transistor and a gate of the second transistor being coupled to the inverted output of the PWM control circuit, the PWM control circuit receiving the output of the current-mode-control circuit, the slope compensation generation current, and the inductor sense current as inputs; and wherein the math operation circuit is configured to solve the following equation: Se >0.5*Sf(x 1 , x 2 , . . ., xi), wherein Se is an output to the slope voltage formation circuit, Sf(x 1 , x 2 , . . ., xi) is an inductor current falling slope function for determining a falling slope Sf based on the output of the current control circuit, the output of the current control circuit represented by x 1 , x 2 , . . ., xi.

2. The circuit of claim 1 , further comprising: a capacitor coupled to the inductor for forming a low-pass filter.

3. The circuit of claim 1 , wherein the feedback loop comprises at least one resistor.

4. The circuit of claim 1 , wherein the slope voltage formation circuit comprises:

an amplifier receiving an input voltage and a feedback voltage;

a third transistor coupled to an output of the amplifier;

a fourth transistor coupled between the third transistor and the power supply voltage;

a fifth transistor coupled to the power supply voltage and the fourth transistor;

a first resistor coupled between the third transistor and ground; and

a sixth transistor coupled to the fifth transistor.

5. The circuit of claim 4 , wherein a gate of the third transistor is coupled to the output of the amplifier, and a source of the third transistor is coupled to an input of the amplifier for providing the feedback voltage.

6. The circuit of claim 4 , wherein the input voltage is proportional to the output of the current-mode-control circuit.

7. The circuit of claim 4 , wherein the voltage-to-current conversion circuit comprises:

a second amplifier having an input coupled to a drain of the fifth transistor and a drain of the sixth transistor;

a seventh transistor coupled to an output of the second amplifier;

an eighth transistor coupled between the power supply voltage and the seventh transistor;

a ninth transistor coupled to the power supply voltage and the eighth transistor; and

a second resistor coupled between the seventh transistor and ground.

8. The circuit of claim 7 , wherein the slope compensation current is output from the ninth transistor.

9. The circuit of claim 1 , wherein the inductor current sense circuit comprises at least one transistor having a similar aspect ratio to an aspect ratio of the first transistor such that the inductor current sense circuit calculates a current through the inductor by minoring the current output from the first transistor.

10. The circuit of claim 1 , wherein the pulse width modulation control circuit comprises:

a third amplifier receiving a reference voltage and a voltage proportional to the output of the current control circuit as inputs;

a low-pass filter coupled to an output of the third amplifier;

a fourth amplifier coupled to the low-pass filter, and receiving the slope compensation current and the inductor sense current as inputs;

a hysteresis buffer coupled to the fourth amplifier; and

a latch coupled to the hysteresis buffer.

11. The circuit of claim 10 , wherein the fourth amplifier compares voltages proportional to the slope compensation current and the inductor sense current with the output of the third amplifier and stores a result in the hysteresis buffer.

12. A method for controlling a switching regulator, comprising:

receiving, by a slope compensation generation circuit that includes a capacitor, a voltage proportional to an output voltage at an output of the switching regulator; generating, by the slope compensation generation circuit, a slope compensation current: the slope compensation generation circuit comprising: a math operation circuit receiving the output of the current control circuit; a slope voltage formation circuit, different from the math operation circuit, coupled to the math operation circuit; and a voltage-to-current conversion circuit coupled to the slope voltage formation circuit; transmitting the slope compensation current from the slope compensation generation circuit to a pulse width modulation control circuit; comparing, by a comparator in the pulse width modulation control circuit, a voltage proportional to the slope compensation current and a reference voltage and storing a comparison result; generating, by the pulse width modulation control circuit, a switching control signal and an inverted switching control signal based on the comparison result; transmitting the switching control signal to an induction current sense circuit; and transmitting the inverted switching control signal to a first transistor and a second transistor, the first and second transistors coupled to the output by an inductor; and wherein the math operation circuit is configured to solve the following equation: Se >0.5*Sf(xl, x 2 , . . ., xi), wherein Se is an output to the slope voltage formation circuit, Sf(xl, x 2 , . . ., xi) is an inductor current falling slope function for determining a falling slope Sf based on the output of the current control circuit, the output of the current control circuit represented by x 1 , x 2 , . . ., xi.

13. The method of claim 12 , wherein the slope compensation current is proportional to the voltage proportional to the output voltage of the switching regulator.

14. The method of claim 12 , further comprising:

receiving the switching control signal and a power supply voltage at the induction current sense circuit;

generating, by the induction current sense circuit, an induction sense current from the at least one switching control signal and the power supply voltage.

15. The method of claim 14 , wherein comparing a voltage proportional to the slope compensation current and to a reference voltage further comprises:

receiving, by the pulse width modulation control circuit, the induction sense current; and

comparing, by the comparator in the pulse width modulation control circuit, a voltage proportional to the slope compensation current and the induction sense current and a reference voltage and storing the comparison result.

16. The method of claim 15 , wherein the induction sense current is proportional to a current flowing through an inductor of the switching regulator.

17. The method of claim 16 , wherein the current flows through the inductor based on the switching signal.