Method for fabricating a semiconductor and semiconductor package

1. A method for fabricating a semiconductor chip module, comprising:

providing a first layer, a second layer, and a base layer, wherein the first layer is disposed on the base layer, and the second layer is disposed on the first layer;

applying a plurality of semiconductor chips above the second layer; and

separating the second layer with the applied semiconductor chips from the first layer.

2. The method of claim 1 , further comprising:

covering the semiconductor chips and the second layer at least in part with a material layer.

3. The method of claim 2 , wherein the covering comprises molding.

4. The method of claim 1 , comprising wherein the second layer is a dielectric layer.

5. The method of claim 4 , wherein the second layer comprises a dielectric material comprising an additive, which releases electrically conducting material upon irradiation.

6. The method of claim 5 , comprising wherein the base material of the second layer is out of the group or a combination of acrylate, epoxy-B-stage, PBO, polyimide or thermoplastic material.

7. The method of claim 4 , wherein the second layer comprises a dielectric material comprising an additive, which releases a catalytic starter upon irradiation.

8. The method of claim 1 , further comprising:

forming a plurality of electrical conductors extending through the second layer to connect to contact pads on surfaces of the semiconductor chips, respectively.

9. The method of claim 8 , further comprising:

fabricating a wiring layer onto the second layer, the wiring layer comprising electrically conductive contact areas connected to the electrical conductors.