Interconnection of land section to wiring layers at center of external connection terminals in semiconductor device and manufacturing thereof

1. A semiconductor device comprising:

a semiconductor substrate;

an external connection terminal formed on a first surface of the semiconductor substrate;

a first wiring layer formed on the first surface of the semiconductor;

a second wiring layer electrically connecting the first wiring layer and the external connection terminal; and

a land section electrically connecting the first wiring layer and the second wiring layer,

wherein the land section is placed in a land section formation region surrounded by a plurality of the external connection terminals, and the land section is placed along a straight line connecting a center of each of the external connection terminals placed diagonal to each other, with the land section formation region being positioned between the plurality of the external connection terminals.

2. The semiconductor device according to claim 1 , further comprising:

a stress-absorbing layer formed between the semiconductor substrate and the external connection terminal.

3. A semiconductor device comprising:

a semiconductor substrate;

an external connection terminal formed on a first surface of the semiconductor substrate;

a first electrode formed on the first surface of the semiconductor substrate and electrically connected to the external connection terminal;

an electronic element formed on the second surface of the semiconductor substrate facing the first surface;

a second electrode electrically connected to the electronic element and having a top face and a rear face;

a groove portion formed on the second surface of the semiconductor and leading to the second electrode;

a conductive portion formed inside the grove portion and electrically connected to the rear face of the second electrode;

a first wiring layer formed on the first surface of the semiconductor and electrically connected to the first electrode;

a second wiring layer electrically connecting the first wiring layer and the external connection terminal;

a stress-absorbing layer formed between the semiconductor substrate and the external connection terminal;

a land section electrically connecting the first wiring layer and the second wiring layer, the land section being structured so that a part of the stress-absorbing layer is opened and the first wiring layer is exposed,

wherein the land section is placed in a land section formation region surrounded by a plurality of the external connection terminals, and the land section is placed along a straight line connecting a center of each of the external connection terminals placed diagonal to each other, with the land section formation region being positioned between the plurality of the external connection terminals.

4. The semiconductor device according to claim 3 , further comprising:

a metal film formed on the top face of the second electrode and being formed of an identical material as that of the interconnection.

5. The semiconductor device according to claim 3 , further comprising:

a connection electrode formed on the second surface of the semiconductor substrate and being electrically connected to the conductive portion.

6. The semiconductor device according to claim 4 , further comprising:

a connection electrode formed on the second surface of the semiconductor substrate and being electrically connected to the conductive portion.

7. A manufacturing method for semiconductor device, comprising:

preparing a semiconductor substrate including a first surface and a second surface on a side opposite to the first surface;

forming a first electrode on the first surface of the semiconductor substrate;

forming a second electrode having a top face and a rear face on the first surface of the semiconductor substrate;

a wiring step forming on the semiconductor substrate an interconnection electrically connecting the first electrode to an external connection terminal;

forming a stress-absorbing layer between the semiconductor substrate and the external connection terminal;

forming a groove portion on the semiconductor substrate from a second surface to the second electrode, the second surface opposing a first surface of the semiconductor substrate;

forming an insulating film on a side wall of the groove portion; and

forming in the groove portion a conductive portion electrically connecting an electronic element to the second electrode; wherein

the wiring step comprises:

forming a first wiring layer on the first surface of the semiconductor, first wiring layer being electrically connected to the first electrode;

forming a second wiring layer electrically connecting the first wiring layer and the external connection terminal;

forming a land section electrically connecting the first wiring layer and the second wiring layer by opening a part of the stress-absorbing layer and exposing the first wiring layer,

wherein the land section is placed in a land section formation region surrounded by a plurality of the external connection terminals, and the land section is placed along a straight line connecting a center of each of the external connection terminals placed diagonal to each other, with the land section formation region being positioned between the plurality of the external connection terminals.