Monolithic three terminal photodetector
Photodetectors operable to achieve multiplication of photogenerated carriers at ultralow voltages. Embodiments include a first p-i-n semiconductor junction combined with a second p-i-n semiconductor junction to form a monolithic photodetector having at least three terminals. The two p-i-n structures may share either the p-type region or the n-type region as a first terminal. Regions of the two p-i-n structures doped complementary to that of the shared terminal form second and third terminals so that the first and second p-i-n structures are operable in parallel. A multiplication region of the first p-i-n structure is to multiply charge carriers photogenerated within an absorption region of the second p-i-n structure with voltage drops between the shared first terminal and each of the second and third terminals being noncumulative.
1. A monolithic three terminal photodetector, comprising:
first doped semiconductor regions of a first conductivity type coupled to a first terminal of the photodetector;
second doped semiconductor regions of a second conductivity type, complementary to the first type, interdigitated with the first regions over an area of a substrate with an intervening semiconductor region of lower impurity concentration than the first and second regions separating the first and second regions, the second semiconductor regions coupled to a second terminal of the photodetector; and
a semiconductor absorption region disposed proximate to the intervening semiconductor region and coupled to a third terminal of the photodetector, and to at least one of the first and second terminals.
2. The photodetector of claim 1 , wherein the first doped semiconductor regions are n-type and the second doped semiconductor regions are p-type.
3. The photodetector of claim 1 , wherein the intervening semiconductor region comprises a first group IV semiconductor and wherein the absorption region comprises a second group IV semiconductor.
4. The photodetector of claim 3 , wherein the first group IV semiconductor is one of Si, Ge, or a Si x Ge y alloy and wherein the second group IV semiconductor is another of Si, Ge, or Si x Ge y alloy.
5. The photodetector of claim 4 , wherein the first group IV semiconductor is Si and the second group IV semiconductor is Ge and wherein the absorption region is coupled to the third terminal through a p-type region.
6. The photodetector of claim 5 , wherein the absorption region has a thickness of between 0.4 μm and 3 μm.
7. The photodetector of claim 2 , wherein the multiplication region and absorption regions are intrinsically doped.
8. The photodetector of claim 2 , wherein the multiplication region has a width of between 30 nm and 150 nm.
9. The photodetector of claim 2 , further comprising a dopant diffusion barrier between the absorption region and the multiplication region.
10. The photodetector of claim 1 , wherein the area of the substrate is between 4 μm 2 and 20 μm 2 .
11. A photodetector circuit, comprising:
the photodetector of claim 1 ; and
one or more voltage supply coupled to the photodetector with the second and third terminals both coupled to a common node at a reference voltage.
12. The circuit of claim 11 , wherein the one or more voltage supply provides less than 6V.
13. The circuit of claim 12 , wherein a reverse bias across the first and second terminal is sufficient to induce carrier multiplication within an i-layer disposed between the first and second doped semiconductor regions, and wherein a reverse bias across the first and third terminal is sufficient to induce carrier drift within the semiconductor absorption region.
14. The circuit of claim 11 , wherein the semiconductor absorption region is optically coupled a waveguide.
15. The circuit of claim 11 , further comprising a p-type layer coupling the semiconductor absorption region to the third terminal.
16. A monolithic three terminal photodetector, comprising:
n-type semiconductor regions coupled to a first terminal;
p-type semiconductor regions interdigitated with the n-type regions over an area of a substrate, the p-type semiconductor regions coupled to a second terminal;
a semiconductor absorption region disposed proximate to the n-type and p-type regions and coupled to a third terminal and to at least one of the first and second terminals; and
an avalanche multiplication region between the first and second terminals, wherein the multiplication region and absorption regions are intrinsically doped.
17. A monolithic three terminal photodetector, comprising:
n-type semiconductor regions coupled to a first terminal;
p-type semiconductor regions interdigitated with the n-type regions over an area of a substrate, the p-type semiconductor regions coupled to a second terminal;
a semiconductor absorption region disposed proximate to the n-type and p-type regions and coupled to a third terminal and to at least one of the first and second terminals;
an avalanche multiplication region between the first and second terminals; and
a dopant diffusion barrier between the absorption region and the multiplication region.
18. A photodetector circuit, comprising:
a monolithic three terminal photodetector, comprising:
n-type semiconductor regions coupled to a first terminal;
p-type semiconductor regions interdigitated with the n-type regions over an area of a substrate, the p-type semiconductor regions coupled to a second terminal;
a semiconductor absorption region disposed proximate to the n-type and p-type regions and coupled to a third terminal and to at least one of the first and second terminals; and
an avalanche multiplication region between the first and second terminals; and
one or more voltage supply coupled to the photodetector with the second and third terminals both coupled to a common node at a reference voltage.
19. The circuit of claim 18 , wherein the one or more voltage supply is to provide less than 6V.