IP Library Granted Patent US 8,357,939
Granted Patent B2
US 8,357,939 · App. 12/956,160 · Granted Jan 22, 2013

Silicon wafer and production method therefor

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Quick Facts
Patent No.
US 8,357,939
App. No.
12/956,160
Granted
Jan 22, 2013
Kind
B2
Abstract

A silicon wafer includes BMDs with a diagonal length of from 10 nm to 50 nm, and has a density of BMD which exists at a depth of 50 μm and deeper from the surface of the silicon wafer which is greater than or equal to 1×10 11 /cm 3 , and a ratio of the {111} plane of the BMD to the total planes surrounding the BMD, as an indication of the morphology of the BMD, is less than or equal to 0.3.

Claims (29)

1. A silicon wafer comprising BMDs with a diagonal length of 10 nm to 50 nm, the diagonal length being the length in a <100> direction in a plane image of a BMD projected orthogonally to any one of the {110} planes, wherein a density of said BMDs at a depth position equal to or deeper than 50 μm from a surface of the silicon wafer is greater than or equal to 1×10 11 /cm 3 , and a ratio of {111} plane in total planes surrounding the BMDs is less than or equal to 0.3, wherein the ratio is determined as the ratio of length of the {111} plane to total length of the circumference, when a BMD is projected in a <110> direction,

wherein the silicon wafer has a nitrogen concentration of 1.5×10 14 to 5×10 15 atoms/cm 3 , a carbon concentration of 3×10 15 to 2×10 17 atoms/cm 3 , and an oxygen concentration of 8×10 17 to 9×10 17 atoms/cm 3 , and

wherein the silicon wafer is derived from a silicon single crystal pulled from a crystal pulling furnace.

2. A method for producing a silicon wafer of claim 1 , comprising pulling a silicon crystal in a crystal pulling furnace;

setting the partial pressure of hydrogen inside the crystal pulling furnace to 3 to 40 Pa and

cooling the silicon crystal at a rate greater than or equal to 5° C./minute over the temperature range of 1000° C. to 900° C.;

obtaining a silicon substrate wafer from the silicon crystal, wherein an oxygen concentration of the silicon substrate wafer is from 8×10 17 atoms/cm 3 to 9×10 17 atoms/cm 3 ;

a carbon concentration of the silicon substrate wafer is from 3×10 15 atoms/cm 3 to 2×10 17 atoms/cm 3 ; and

a nitrogen concentration of the silicon substrate wafer is from 1.5×10 14 atoms/cm 3 to 5×10 15 atoms/cm 3 ;

the method further comprising the steps of subjecting the silicon substrate wafer to heat treatment step (A), heat treatment step (B) and heat treatment step (C), in that order:

(A) inserting the silicon substrate wafer into a heat treatment furnace set at temperature of 700° C. to 800° C.;

increasing the temperature at a rate of 5° C./minute to 10° C./minute over the range of the insertion temperature of the silicon substrate wafer to a temperature of below 1100° C.;

increasing the temperature at a rate of 1° C./minute to 2° C./minute over the temperature range of 1100° C. to 1250° C.;

keeping the temperature within the temperature range of 1200° C. to 1250° C. for from 2 to 4 hours;

decreasing the temperature of the heat treatment furnace at a temperature decreasing rate of 1° C./minute to 10° C./minute;

removing the silicon substrate wafer from the heat treatment furnace at a temperature of 700° C. to 800°; and

cooling said silicon substrate wafer down to room temperature;

(B) inserting the silicon substrate wafer treated by step (A) into a heat treatment furnace set at a temperature of at from 700° C. to 800° C.;

performing a holding heat treatment at a temperature of 700° C. to 800° C. for 30 minutes to 5 hours;

increasing the temperature at a rate of 0.5° C./minute to 2° C./minute up to a temperature which is higher by 50° C. or more than the holding temperature;

decreasing the temperature of the heat treatment furnace at a rate of 1° C./minute to 10° C./minute;

removing the silicon substrate wafer from the furnace at a temperature of 700° C. to 800° C.; and

cooling the substrate down to room temperature;

(C) inserting the silicon substrate wafer treated by step (B) to a heat treatment furnace set at a temperature of at 700° C. to 800° C.;

increasing the temperature at a rate of 5° C./minute to 10° C./minute over the range of the insertion temperature of the silicon substrate wafer to a temperature of below 1100° C.;

increasing the temperature at a rate of 1° C./minute to 2° C./minute over the temperature range of from 1100° C. to 1250° C.;

maintaining the temperature at temperature of 1200° C. to 1250° C. for from 1 to 4 hours;

decreasing the temperature of the heat treatment furnace at a rate of 1° C./minute to 10° C./minute; and

removing the silicon substrate wafer from the heat treatment furnace at a temperature of from 700° C. to 800° C.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2010
From: NAKAI, KATSUHIKO
To: SILTRONIC AG
Reel/Frame 025431/0854 →