IP Library Granted Patent US 8,247,903
Granted Patent B2
US 8,247,903 · App. 12/957,878 · Granted Aug 21, 2012

Semiconductor device

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Quick Facts
Patent No.
US 8,247,903
App. No.
12/957,878
Granted
Aug 21, 2012
Kind
B2
Abstract

A semiconductor device includes an insulating film formed on a substrate; an interconnect layer including a plurality of interconnects formed in the insulating film; and a pad formed on the insulating film. In a region containing at least a part of a section below the pad, a narrow spacing region is formed, where a spacing between the adjacent interconnects is shorter than that in a section outside the region containing at least a part of the section below the pad.

Claims (21)

1. A semiconductor device, comprising:

an insulating film formed on a substrate;

an interconnect layer including a plurality of interconnects formed in the insulating film; and

a pad formed on the insulating film,

wherein, in a region containing at least a part of a section below the pad, a narrow spacing region is formed, where a spacing between the adjacent interconnects is shorter than that in a section outside the region containing at least a part of the section below the pad.

2. The semiconductor device of claim 1 , wherein

the width of each of the plurality of interconnects inside the narrow spacing region is shorter than that outside the narrow spacing region.

3. The semiconductor device of claim 1 , wherein

the plurality of interconnects include an interconnect which has a single section outside the narrow spacing region, and which is branched into more than two sections inside the narrow spacing region.

4. The semiconductor device of claim 1 , wherein

the plurality of interconnects include a non-electrically-connected dummy interconnect arranged inside the narrow spacing region.

5. The semiconductor device of claim 1 , wherein

at least a single test region is further provided on the pad and above the narrow spacing region.

6. The semiconductor device of claim 1 , wherein

at least a single bump is formed on the pad and above the narrow spacing region.

7. The semiconductor device of claim 1 , wherein

at least a single wire is connected to a section on the pad and above the narrow spacing region.

8. The semiconductor device of claim 1 , wherein

at least a spacing between two interconnects is shortened so as to define a tapered shape from an outside of the narrow spacing region toward an inside of the narrow spacing region.

9. The semiconductor device of claim 1 , wherein

the plurality of interconnects are formed in the same layer.

Assignments (5)
CHANGE OF NAME Recorded Nov 3, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 058793/0785 →
RELEASE OF SECURITY INTEREST Recorded Nov 6, 2020
From: CPPIB CREDIT INVESTMENTS INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 054344/0143 →
AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2018
From: PANASONIC CORPORATION
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 045773/0387 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2011
From: KODERA, KEISUKE
To: PANASONIC CORPORATION
Reel/Frame 025785/0561 →